]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
openrisc: dts: Split simple smp dts to dts and dtsi
authorStafford Horne <shorne@gmail.com>
Sun, 14 Dec 2025 07:40:03 +0000 (07:40 +0000)
committerStafford Horne <shorne@gmail.com>
Fri, 16 Jan 2026 16:38:56 +0000 (16:38 +0000)
Split out the common memory, CPU and PIC definitions of the simple SMP
system to a DTSI file which we will later use for our De0 Nano multicore
board device tree.  We also take this opportunity to swich underscores
to dashes as that seems to be the more common convention for DTS files.

Signed-off-by: Stafford Horne <shorne@gmail.com>
arch/openrisc/boot/dts/simple-smp.dts [new file with mode: 0644]
arch/openrisc/boot/dts/simple-smp.dtsi [moved from arch/openrisc/boot/dts/simple_smp.dts with 90% similarity]
arch/openrisc/configs/simple_smp_defconfig

diff --git a/arch/openrisc/boot/dts/simple-smp.dts b/arch/openrisc/boot/dts/simple-smp.dts
new file mode 100644 (file)
index 0000000..01cf219
--- /dev/null
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/dts-v1/;
+
+#include "simple-smp.dtsi"
+
+/ {
+       model = "Simple SMP Board";
+};
+
+&cpu0 {
+       clock-frequency = <20000000>;
+};
+
+&cpu1 {
+       clock-frequency = <20000000>;
+};
+
+&enet0 {
+       status = "okay";
+};
+
+&serial0 {
+       clock-frequency = <20000000>;
+};
similarity index 90%
rename from arch/openrisc/boot/dts/simple_smp.dts
rename to arch/openrisc/boot/dts/simple-smp.dtsi
index 71af0e117bfe5f675806c63beaf78def53433a82..42d6eda33b71e1d0722735fd29e248f448e50e5d 100644 (file)
@@ -1,4 +1,3 @@
-/dts-v1/;
 / {
        compatible = "opencores,or1ksim";
        #address-cells = <1>;
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
-               cpu@0 {
+
+               cpu0: cpu@0 {
                        compatible = "opencores,or1200-rtlsvn481";
                        reg = <0>;
-                       clock-frequency = <20000000>;
                };
-               cpu@1 {
+
+               cpu1: cpu@1 {
                        compatible = "opencores,or1200-rtlsvn481";
                        reg = <1>;
-                       clock-frequency = <20000000>;
                };
        };
 
@@ -57,7 +56,6 @@
                compatible = "opencores,uart16550-rtlsvn105", "ns16550a";
                reg = <0x90000000 0x100>;
                interrupts = <2>;
-               clock-frequency = <20000000>;
        };
 
        enet0: ethoc@92000000 {
@@ -65,5 +63,6 @@
                reg = <0x92000000 0x800>;
                interrupts = <4>;
                big-endian;
+               status = "disabled";
        };
 };
index 6008e824d31c86b9e1aac0e7429655954844b9aa..db77c795225e9d229ba41daa756c4a75215a5e0a 100644 (file)
@@ -20,7 +20,7 @@ CONFIG_SLUB=y
 CONFIG_SLUB_TINY=y
 CONFIG_MODULES=y
 # CONFIG_BLOCK is not set
-CONFIG_BUILTIN_DTB_NAME="simple_smp"
+CONFIG_BUILTIN_DTB_NAME="simple-smp"
 CONFIG_SMP=y
 CONFIG_HZ_100=y
 CONFIG_OPENRISC_HAVE_SHADOW_GPRS=y