scsi: soc: qcom: ice: Make qcom_ice_program_key() take struct blk_crypto_key

qcom_ice_program_key() currently accepts the key as an array of bytes,
algorithm ID, key size enum, and data unit size.  However both callers
have a struct blk_crypto_key which contains all that information.  Thus
they both have similar code that converts the blk_crypto_key into the
form that qcom_ice_program_key() wants.  Once wrapped key support is
added, the key type would need to be added to the arguments too.

Therefore, this patch changes qcom_ice_program_key() to take in all this
information as a struct blk_crypto_key directly.  The calling code is
updated accordingly.  This ends up being much simpler, and it makes the
key type be passed down automatically once wrapped key support is added.

Based on a patch by Gaurav Kashyap <quic_gaurkash@quicinc.com> that
replaced the byte array argument only.  This patch makes the
blk_crypto_key replace other arguments like the algorithm ID too,
ensuring that there remains only one source of truth.

Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tested-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> # sm8650
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20250404231533.174419-2-ebiggers@kernel.org
Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 57bd49eea77724a94b5fa0ac27e01332c36d2766..5694ad0a35567d512ab3acec2d7c64faf0587d50 100644 (file)
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -1962,16 +1962,7 @@ static int sdhci_msm_ice_keyslot_program(struct blk_crypto_profile *profile,
        struct sdhci_msm_host *msm_host =
                sdhci_msm_host_from_crypto_profile(profile);
 
-       /* Only AES-256-XTS has been tested so far. */
-       if (key->crypto_cfg.crypto_mode != BLK_ENCRYPTION_MODE_AES_256_XTS)
-               return -EOPNOTSUPP;
-
-       return qcom_ice_program_key(msm_host->ice,
-                                   QCOM_ICE_CRYPTO_ALG_AES_XTS,
-                                   QCOM_ICE_CRYPTO_KEY_SIZE_256,
-                                   key->bytes,
-                                   key->crypto_cfg.data_unit_size / 512,
-                                   slot);
+       return qcom_ice_program_key(msm_host->ice, slot, key);
 }
 
 static int sdhci_msm_ice_keyslot_evict(struct blk_crypto_profile *profile,

diff --git a/drivers/soc/qcom/ice.c b/drivers/soc/qcom/ice.c
index 2310afa77b76b0da1679a50248d60830b1e5be8c..5cadf5e3cf98262f1a9ef307ba7811e60be4daa1 100644 (file)
--- a/drivers/soc/qcom/ice.c
+++ b/drivers/soc/qcom/ice.c
@@ -162,10 +162,8 @@ int qcom_ice_suspend(struct qcom_ice *ice)
 }
 EXPORT_SYMBOL_GPL(qcom_ice_suspend);
 
-int qcom_ice_program_key(struct qcom_ice *ice,
-                        u8 algorithm_id, u8 key_size,
-                        const u8 crypto_key[], u8 data_unit_size,
-                        int slot)
+int qcom_ice_program_key(struct qcom_ice *ice, unsigned int slot,
+                        const struct blk_crypto_key *blk_key)
 {
        struct device *dev = ice->dev;
        union {
@@ -176,15 +174,18 @@ int qcom_ice_program_key(struct qcom_ice *ice,
        int err;
 
        /* Only AES-256-XTS has been tested so far. */
-       if (algorithm_id != QCOM_ICE_CRYPTO_ALG_AES_XTS ||
-           key_size != QCOM_ICE_CRYPTO_KEY_SIZE_256) {
-               dev_err_ratelimited(dev,
-                                   "Unhandled crypto capability; algorithm_id=%d, key_size=%d\n",
-                                   algorithm_id, key_size);
+       if (blk_key->crypto_cfg.crypto_mode !=
+           BLK_ENCRYPTION_MODE_AES_256_XTS) {
+               dev_err_ratelimited(dev, "Unsupported crypto mode: %d\n",
+                                   blk_key->crypto_cfg.crypto_mode);
                return -EINVAL;
        }
 
-       memcpy(key.bytes, crypto_key, AES_256_XTS_KEY_SIZE);
+       if (blk_key->size != AES_256_XTS_KEY_SIZE) {
+               dev_err_ratelimited(dev, "Incorrect key size\n");
+               return -EINVAL;
+       }
+       memcpy(key.bytes, blk_key->bytes, AES_256_XTS_KEY_SIZE);
 
        /* The SCM call requires that the key words are encoded in big endian */
        for (i = 0; i < ARRAY_SIZE(key.words); i++)
@@ -192,7 +193,7 @@ int qcom_ice_program_key(struct qcom_ice *ice,
 
        err = qcom_scm_ice_set_key(slot, key.bytes, AES_256_XTS_KEY_SIZE,
                                   QCOM_SCM_ICE_CIPHER_AES_256_XTS,
-                                  data_unit_size);
+                                  blk_key->crypto_cfg.data_unit_size / 512);
 
        memzero_explicit(&key, sizeof(key));
 

diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c
index 1b37449fbffc50ac4ae347f0d2586e0ee79a14f3..b111b37cef109b797b3cfaee9ac5ad3a7ff38502 100644 (file)
--- a/drivers/ufs/host/ufs-qcom.c
+++ b/drivers/ufs/host/ufs-qcom.c
@@ -217,17 +217,8 @@ static int ufs_qcom_ice_keyslot_program(struct blk_crypto_profile *profile,
        struct ufs_qcom_host *host = ufshcd_get_variant(hba);
        int err;
 
-       /* Only AES-256-XTS has been tested so far. */
-       if (key->crypto_cfg.crypto_mode != BLK_ENCRYPTION_MODE_AES_256_XTS)
-               return -EOPNOTSUPP;
-
        ufshcd_hold(hba);
-       err = qcom_ice_program_key(host->ice,
-                                  QCOM_ICE_CRYPTO_ALG_AES_XTS,
-                                  QCOM_ICE_CRYPTO_KEY_SIZE_256,
-                                  key->bytes,
-                                  key->crypto_cfg.data_unit_size / 512,
-                                  slot);
+       err = qcom_ice_program_key(host->ice, slot, key);
        ufshcd_release(hba);
        return err;
 }

diff --git a/include/soc/qcom/ice.h b/include/soc/qcom/ice.h
index fdf1b5c21eb9acf58885521d657f43c5f3340985..24573e4250395d59fd7ad48f70673b4dacd43482 100644 (file)
--- a/include/soc/qcom/ice.h
+++ b/include/soc/qcom/ice.h
@@ -6,32 +6,16 @@
 #ifndef __QCOM_ICE_H__
 #define __QCOM_ICE_H__
 
+#include <linux/blk-crypto.h>
 #include <linux/types.h>
 
 struct qcom_ice;
 
-enum qcom_ice_crypto_key_size {
-       QCOM_ICE_CRYPTO_KEY_SIZE_INVALID        = 0x0,
-       QCOM_ICE_CRYPTO_KEY_SIZE_128            = 0x1,
-       QCOM_ICE_CRYPTO_KEY_SIZE_192            = 0x2,
-       QCOM_ICE_CRYPTO_KEY_SIZE_256            = 0x3,
-       QCOM_ICE_CRYPTO_KEY_SIZE_512            = 0x4,
-};
-
-enum qcom_ice_crypto_alg {
-       QCOM_ICE_CRYPTO_ALG_AES_XTS             = 0x0,
-       QCOM_ICE_CRYPTO_ALG_BITLOCKER_AES_CBC   = 0x1,
-       QCOM_ICE_CRYPTO_ALG_AES_ECB             = 0x2,
-       QCOM_ICE_CRYPTO_ALG_ESSIV_AES_CBC       = 0x3,
-};
-
 int qcom_ice_enable(struct qcom_ice *ice);
 int qcom_ice_resume(struct qcom_ice *ice);
 int qcom_ice_suspend(struct qcom_ice *ice);
-int qcom_ice_program_key(struct qcom_ice *ice,
-                        u8 algorithm_id, u8 key_size,
-                        const u8 crypto_key[], u8 data_unit_size,
-                        int slot);
+int qcom_ice_program_key(struct qcom_ice *ice, unsigned int slot,
+                        const struct blk_crypto_key *blk_key);
 int qcom_ice_evict_key(struct qcom_ice *ice, int slot);
 struct qcom_ice *devm_of_qcom_ice_get(struct device *dev);