branch_and_jump_instructions.stdout.exp \
branch_and_jump_instructions.stderr.exp branch_and_jump_instructions.vgtest \
branches.stdout.exp branches.stderr.exp branches.vgtest \
+ cvm_bbit.stdout.exp cvm_bbit.stdout.exp-non-octeon \
+ cvm_bbit.stderr.exp cvm_bbit.vgtest \
cvm_ins.stdout.exp cvm_ins.stdout.exp-non-octeon \
cvm_ins.stderr.exp cvm_ins.vgtest \
cvm_lx_ins.stdout.exp-LE cvm_lx_ins.stdout.exp-BE \
arithmetic_instruction \
branch_and_jump_instructions \
branches \
+ cvm_bbit \
cvm_ins \
cvm_lx_ins \
cvm_atomic \
allexec_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_NONNULL@
+cvm_bbit_CFLAGS = $(AM_CFLAGS) -g -O0 @FLAG_OCTEON@
cvm_ins_CFLAGS = $(AM_CFLAGS) -g -O0 @FLAG_OCTEON@
cvm_lx_ins_CFLAGS = $(AM_CFLAGS) -g -O0 @FLAG_OCTEON2@
cvm_atomic_CFLAGS = $(AM_CFLAGS) -g -O0 @FLAG_OCTEON2@
--- /dev/null
+#include <stdio.h>
+
+int main()
+{
+#if (_MIPS_ARCH_OCTEON)
+ int t1 = 0;
+ int t2 = 0;
+ __asm__ volatile(
+ ".set noreorder" "\n\t"
+ "move $t0, $zero" "\n\t"
+ "label2:" "\n\t"
+ "addiu $t0, $t0, 1" "\n\t"
+ "bbit0 $t0, 0x3, label2" "\n\t"
+ "nop" "\n\t"
+ "move %0, $t0" "\n\t"
+ ".set reorder" "\n\t"
+ : "=r" (t1)
+ :
+ : "t0");
+ __asm__ volatile(
+ ".set noreorder" "\n\t"
+ "li $t0, 0xff" "\n\t"
+ "label1:" "\n\t"
+ "addiu $t0, $t0, -1" "\n\t"
+ "bbit1 $t0, 0x3, label1" "\n\t"
+ "nop" "\n\t"
+ "move %0, $t0" "\n\t"
+ ".set reorder" "\n\t"
+ : "=r" (t2)
+ :
+ : "t0");
+
+ printf("TEST bbit0: %s\n", t1 == 0x08 ? "PASS" : "FAIL");
+ printf("TEST bbit1: %s\n", t2 == 0xF7 ? "PASS" : "FAIL");
+
+#endif
+ return 0;
+}