drm/amdgpu: Revert retry based thrashing prevention on GFX 12.1.0

Revert the change to enable retry based thrashing prevention on GFX 12.1.0
for now as its causing data mismatch and slowness issues with multiple HIP
tests.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
index 8f29a72353c71fb1d1a891ed0c246cdf5aed4a7e..522f478ca4bc8220e087d64d4554ebeaf55bd4e7 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
@@ -2512,17 +2512,6 @@ static void gfx_v12_1_init_golden_registers(struct amdgpu_device *adev)
 {
        uint32_t val;
 
-       /* Setup the TCP Thrashing control register */
-       val = RREG32_SOC15(GC, 0, regTCP_UTCL0_THRASHING_CTRL);
-
-       val = REG_SET_FIELD(val, TCP_UTCL0_THRASHING_CTRL, THRASHING_EN, 0x2);
-       val = REG_SET_FIELD(val, TCP_UTCL0_THRASHING_CTRL,
-                               RETRY_FRAGMENT_THRESHOLD_DOWN_EN, 0x0);
-       val = REG_SET_FIELD(val, TCP_UTCL0_THRASHING_CTRL,
-                               RETRY_FRAGMENT_THRESHOLD_UP_EN, 0x0);
-
-       WREG32_SOC15(GC, 0, regTCP_UTCL0_THRASHING_CTRL, val);
-
        /* Set the TCP UTCL0 register to enable atomics */
        val = RREG32_SOC15(GC, 0, regTCP_UTCL0_CNTL1);
        val = REG_SET_FIELD(val, TCP_UTCL0_CNTL1, ATOMIC_REQUESTER_EN, 0x1);