drm/amd: fix dcn 2.01 check

[ Upstream commit 39f44f54afa58661ecae9c27e15f5dbce2372892 ]

The ASICREV_IS_BEIGE_GOBY_P check always took precedence, because it includes all chip revisions upto NV_UNKNOWN.

Fixes: 54b822b3eac3 ("drm/amd/display: Use dce_version instead of chip_id")
Signed-off-by: Andy Nguyen <theofficialflow1996@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 9c7be0efa6f0daa949a5f3e3fdf9ea090b0713cb)
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
index a0c1072c59a236290d0866300e55125699a9b910..7de77358e1c08631ea71f95650126110627ec10c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
@@ -255,6 +255,10 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p
                        BREAK_TO_DEBUGGER();
                        return NULL;
                }
+               if (ctx->dce_version == DCN_VERSION_2_01) {
+                       dcn201_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
+                       return &clk_mgr->base;
+               }
                if (ASICREV_IS_SIENNA_CICHLID_P(asic_id.hw_internal_rev)) {
                        dcn3_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
                        return &clk_mgr->base;
@@ -267,10 +271,6 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p
                        dcn3_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
                        return &clk_mgr->base;
                }
-               if (ctx->dce_version == DCN_VERSION_2_01) {
-                       dcn201_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
-                       return &clk_mgr->base;
-               }
                dcn20_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
                return &clk_mgr->base;
        }