RISC-V: Add the mini support for SiFive extensions.

This patch add the mini support for xsfvqmaccqoq, xsfvqmaccdod and
 xsfvfnrclipxfqf extensions.

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc: New.
	* config/riscv/riscv.opt: New.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/predef-sf-3.c: New test.
	* gcc.target/riscv/predef-sf-4.c: New test.
	* gcc.target/riscv/predef-sf-5.c: New test.

diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index b0e49eb82c0e81a7c8df40d843755684a3546528..49e8a41846ee76036eafa67c0177968ba756ba5e 100644 (file)
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -430,6 +430,9 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
 
   {"xsfvcp",   ISA_SPEC_CLASS_NONE, 1, 0},
   {"xsfcease", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"xsfvqmaccqoq",    ISA_SPEC_CLASS_NONE, 1, 0},
+  {"xsfvqmaccdod",    ISA_SPEC_CLASS_NONE, 1, 0},
+  {"xsfvfnrclipxfqf", ISA_SPEC_CLASS_NONE, 1, 0},
 
   /* Terminate the list.  */
   {NULL, ISA_SPEC_CLASS_NONE, 0, 0}
@@ -1759,6 +1762,9 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
 
   RISCV_EXT_FLAG_ENTRY ("xsfvcp",   x_riscv_sifive_subext, MASK_XSFVCP),
   RISCV_EXT_FLAG_ENTRY ("xsfcease", x_riscv_sifive_subext, MASK_XSFCEASE),
+  RISCV_EXT_FLAG_ENTRY ("xsfvqmaccqoq",    x_riscv_sifive_subext, MASK_XSFVQMACCQOQ),
+  RISCV_EXT_FLAG_ENTRY ("xsfvqmaccdod",    x_riscv_sifive_subext, MASK_XSFVQMACCDOD),
+  RISCV_EXT_FLAG_ENTRY ("xsfvfnrclipxfqf", x_riscv_sifive_subext, MASK_XSFVFNRCLIPXFQF),
 
   {NULL, NULL, NULL, 0}
 };

diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index ab9d6e8272318c0191217a41c16dad764bdbe009..d7fa47f70806032b14e02499b3d8ce459f7d12f3 100644 (file)
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -523,6 +523,12 @@ Mask(XSFVCP) Var(riscv_sifive_subext)
 
 Mask(XSFCEASE) Var(riscv_sifive_subext)
 
+Mask(XSFVQMACCQOQ) Var(riscv_sifive_subext)
+
+Mask(XSFVQMACCDOD) Var(riscv_sifive_subext)
+
+Mask(XSFVFNRCLIPXFQF) Var(riscv_sifive_subext)
+
 TargetVariable
 int riscv_fmv_priority = 0
 

diff --git a/gcc/testsuite/gcc.target/riscv/predef-sf-3.c b/gcc/testsuite/gcc.target/riscv/predef-sf-3.c
new file mode 100644 (file)
index 0000000..0f3fbfd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-sf-3.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64g_xsfvqmaccqoq -mabi=lp64" } */
+
+int main () {
+#if !defined(__riscv)
+#error "__riscv"
+#endif
+
+#if !defined(__riscv_xsfvqmaccqoq)
+#error "__riscv_xsfvqmaccqoq"
+#endif
+
+  return 0;
+}

diff --git a/gcc/testsuite/gcc.target/riscv/predef-sf-4.c b/gcc/testsuite/gcc.target/riscv/predef-sf-4.c
new file mode 100644 (file)
index 0000000..9df0799
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-sf-4.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64g_xsfvqmaccdod -mabi=lp64" } */
+
+int main () {
+#if !defined(__riscv)
+#error "__riscv"
+#endif
+
+#if !defined(__riscv_xsfvqmaccdod)
+#error "__riscv_xsfvqmaccdod"
+#endif
+
+  return 0;
+}

diff --git a/gcc/testsuite/gcc.target/riscv/predef-sf-5.c b/gcc/testsuite/gcc.target/riscv/predef-sf-5.c
new file mode 100644 (file)
index 0000000..aeaf708
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-sf-5.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64g_xsfvfnrclipxfqf -mabi=lp64" } */
+
+int main () {
+#if !defined(__riscv)
+#error "__riscv"
+#endif
+
+#if !defined(__riscv_xsfvfnrclipxfqf)
+#error "__riscv_xsfvfnrclipxfqf"
+#endif
+
+  return 0;
+}