arm64: dts: amlogic: axg: assign the MMC signal clocks

The amlogic MMC driver operate with the assumption that MMC clock
is configured to provide 24MHz. It uses this path for low
rates such as 400kHz.

Assign the clocks to make sure they are properly configured

Fixes: 221cf34bac54 ("ARM64: dts: meson-axg: enable the eMMC controller")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260114-amlogic-mmc-clocks-followup-v1-3-a999fafbe0aa@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index e95c91894968b2c8b3b8e96a5f5e85cd60f3e085..cc72491eaf6f52d46fed2458191556bd16d837f4 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -1960,6 +1960,9 @@
                                        <&clkc CLKID_FCLK_DIV2>;
                                clock-names = "core", "clkin0", "clkin1";
                                resets = <&reset RESET_SD_EMMC_B>;
+
+                               assigned-clocks = <&clkc CLKID_SD_EMMC_B_CLK0>;
+                               assigned-clock-rates = <24000000>;
                        };
 
                        sd_emmc_c: mmc@7000 {
@@ -1972,6 +1975,9 @@
                                        <&clkc CLKID_FCLK_DIV2>;
                                clock-names = "core", "clkin0", "clkin1";
                                resets = <&reset RESET_SD_EMMC_C>;
+
+                               assigned-clocks = <&clkc CLKID_SD_EMMC_C_CLK0>;
+                               assigned-clock-rates = <24000000>;
                        };
 
                        nfc: nand-controller@7800 {