]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
watchdog: aspeed: Add support for AST2700 platform
authorChin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Fri, 10 Oct 2025 08:03:15 +0000 (16:03 +0800)
committerWim Van Sebroeck <wim@linux-watchdog.org>
Sat, 15 Nov 2025 14:19:53 +0000 (15:19 +0100)
Add AST2700 platform support to the ASPEED watchdog driver. This includes
a new per-platform configuration with SCU reset status register at
SCU1_070 and support for 5 reset mask registers.

Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
drivers/watchdog/aspeed_wdt.c

index d23e565f30a801b573d41a2d67ef0af94a309dd7..c9e79851504c8d14d7dfeaa6923ce0e406b11ad2 100644 (file)
@@ -83,10 +83,24 @@ static const struct aspeed_wdt_config ast2600_config = {
        .num_reset_masks = 2,
 };
 
+static const struct aspeed_wdt_config ast2700_config = {
+       .ext_pulse_width_mask = 0xfffff,
+       .irq_shift = 0,
+       .irq_mask = GENMASK(31, 10),
+       .scu = {
+               .compatible = "aspeed,ast2700-scu0",
+               .reset_status_reg = 0x70,
+               .wdt_reset_mask = 0xf,
+               .wdt_reset_mask_shift = 0,
+       },
+       .num_reset_masks = 5,
+};
+
 static const struct of_device_id aspeed_wdt_of_table[] = {
        { .compatible = "aspeed,ast2400-wdt", .data = &ast2400_config },
        { .compatible = "aspeed,ast2500-wdt", .data = &ast2500_config },
        { .compatible = "aspeed,ast2600-wdt", .data = &ast2600_config },
+       { .compatible = "aspeed,ast2700-wdt", .data = &ast2700_config },
        { },
 };
 MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table);
@@ -483,7 +497,7 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
        }
 
        if (!of_device_is_compatible(np, "aspeed,ast2400-wdt")) {
-               u32 reset_mask[2];
+               u32 reset_mask[5];
                size_t nrstmask = wdt->cfg->num_reset_masks;
                u32 reg = readl(wdt->base + WDT_RESET_WIDTH);
                int i;