net: airoha: Fix register index for Tx-fwd counter configuration

In airoha_qdma_init_qos_stats(), the Tx-fwd counter configuration
register uses the same index (i << 1) as the Tx-cpu counter, which
overwrites the Tx-cpu configuration. The Tx-fwd counter value register
correctly uses (i << 1) + 1, so the configuration register should use
the same index.

Fix the REG_CNTR_CFG index from (i << 1) to ((i << 1) + 1) so that
the Tx-fwd counter is properly configured instead of clobbering the
Tx-cpu counter config.

Fixes: 20bf7d07c956 ("net: airoha: Add sched ETS offload support")
Signed-off-by: Wayen.Yan <win847@gmail.com>
Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/6a2b40e7.4dd82583.3a5c46.e566@mx.google.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/airoha/airoha_eth.c b/drivers/net/ethernet/airoha/airoha_eth.c
index 31cdb11cd78dace139d7ba54e6a76b3e7cbc367a..329988a8400c13a8e2ef60cbd55e9aefb42e3853 100644 (file)
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
@@ -1256,7 +1256,7 @@ static void airoha_qdma_init_qos_stats(struct airoha_qdma *qdma)
                               FIELD_PREP(CNTR_CHAN_MASK, i));
                /* Tx-fwd transferred count */
                airoha_qdma_wr(qdma, REG_CNTR_VAL((i << 1) + 1), 0);
-               airoha_qdma_wr(qdma, REG_CNTR_CFG(i << 1),
+               airoha_qdma_wr(qdma, REG_CNTR_CFG((i << 1) + 1),
                               CNTR_EN_MASK | CNTR_ALL_QUEUE_EN_MASK |
                               CNTR_ALL_DSCP_RING_EN_MASK |
                               FIELD_PREP(CNTR_SRC_MASK, 1) |