Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c18fae9c975406fe53f76d9b067541be8f508ffe..29e3e3919c1407d4b2b8d5c6740e736a2c55fb19 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,44 @@
+2021-08-18  Richard Earnshaw  <rearnsha@arm.com>
+
+       Backported from master:
+       2021-08-05  Richard Earnshaw  <rearnsha@arm.com>
+
+       PR target/101723
+       * config/arm/arm-cpus.in (generic-armv7-a): Add quirk to suppress
+       writing .cpu directive in asm output.
+       * config/arm/arm.c (arm_identify_fpu_from_isa): New variable.
+       (arm_last_printed_arch_string): Delete.
+       (arm_last-printed_fpu_string): Delete.
+       (arm_configure_build_target): If use of floating-point/SIMD is
+       disabled, remove all fp/simd related features from the target ISA.
+       (last_arm_targ_options): New variable.
+       (arm_print_asm_arch_directives): Add new parameters.  Change order
+       of emitted directives and handle all cases here.
+       (arm_file_start): Always call arm_print_asm_arch_directives, move
+       all generation of .arch/.arch_extension here.
+       (arm_file_end): Call arm_print_asm_arch.
+       (arm_declare_function_name): Call arm_print_asm_arch_directives
+       instead of printing .arch/.fpu directives directly.
+
+2021-08-18  Richard Earnshaw  <rearnsha@arm.com>
+
+       Backported from master:
+       2021-08-05  Richard Earnshaw  <rearnsha@arm.com>
+
+       * config/arm/arm.c (arm_configure_build_target): Don't call
+       arm_option_reconfigure_globals.
+       (arm_option_restore): Call arm_option_reconfigure_globals after
+       reconfiguring the target.
+       * config/arm/arm-c.c (arm_pragma_target_parse): Likewise.
+
+2021-08-18  Richard Earnshaw  <rearnsha@arm.com>
+
+       Backported from master:
+       2021-08-05  Richard Earnshaw  <rearnsha@arm.com>
+
+       * config/arm/arm.c (arm_configure_build_target): Ensure the target's
+       arch_name is always set.
+
 2021-08-17  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/101373

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 70b09db5ed78cd71fca723380a26b36f69af6212..30a51b98f77956c0289397f6fa40a3f5ef5c1e6d 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20210818
+20210819

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6ff79b9a5f20a8beff80d467ce794e7e5062f933..5b312deeeaa2692dc8f8fb6aca842a72f84ee91a 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,43 @@
+2021-08-18  Christophe Lyon  <christophe.lyon@foss.st.com>
+
+       Backported from master:
+       2021-08-06  Christophe Lyon  <christophe.lyon@foss.st.com>
+
+       PR target/101723
+       * gcc.target/arm/pr69245.c: Make sure to emit code for fn1, fix
+       typo.
+
+2021-08-18  Christophe Lyon  <christophe.lyon@foss.st.com>
+
+       Backported from master:
+       2021-08-06  Christophe Lyon  <christophe.lyon@foss.st.com>
+
+       PR target/101723
+       * gcc.target/arm/attr-neon3.c: Fix typo.
+       * gcc.target/arm/pragma_fpu_attribute_2.c: Fix typo.
+
+2021-08-18  Richard Earnshaw  <rearnsha@arm.com>
+
+       Backported from master:
+       2021-08-05  Richard Earnshaw  <rearnsha@arm.com>
+
+       PR target/101723
+       * gcc.target/arm/cortex-m55-nofp-flag-hard.c: Update expected output.
+       * gcc.target/arm/cortex-m55-nofp-flag-softfp.c: Likewise.
+       * gcc.target/arm/cortex-m55-nofp-nomve-flag-softfp.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/mve_fpu1.c: Convert to dg-do assemble.
+       Add a non-no-op function body.
+       * gcc.target/arm/mve/intrinsics/mve_fpu2.c: Likewise.
+       * gcc.target/arm/pr98636.c (dg-options): Add -mfloat-abi=softfp.
+       * gcc.target/arm/attr-neon.c: Tighten scan-assembler tests.
+       * gcc.target/arm/attr-neon2.c: Use -Ofast, convert test to use
+       check-function-bodies.
+       * gcc.target/arm/attr-neon3.c: Likewise.
+       * gcc.target/arm/pr69245.c: Tighten scan-assembler match, but allow
+       multiple instances.
+       * gcc.target/arm/pragma_fpu_attribute.c: Likewise.
+       * gcc.target/arm/pragma_fpu_attribute_2.c: Likewise.
+
 2021-08-17  Thomas Schwinge  <thomas@codesourcery.com>
 
        Backported from master: