clk: at91: sama7g5: Allocate only the needed amount of memory for PLLs

[ Upstream commit 2d6e9ee7cb3e79b1713783c633b13af9aeffc90c ]

The maximum number of PLL components on SAMA7G5 is 3 (one fractional
part and 2 dividers). Allocate the needed amount of memory for
sama7g5_plls 2d array. Previous code used to allocate 7 array entries for
each PLL. While at it, replace 3 with PLL_COMPID_MAX in the loop which
parses the sama7g5_plls 2d array.

Fixes: cb783bbbcf54 ("clk: at91: sama7g5: add clock support for sama7g5")
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20240714141315.19480-1-claudiu.beznea@tuxon.dev
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index 91b5c6f14819642d2400fcfcc541a43de5f85c49..4e9594714b142824c146edffaa6801cac79d3267 100644 (file)
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -66,6 +66,7 @@ enum pll_component_id {
        PLL_COMPID_FRAC,
        PLL_COMPID_DIV0,
        PLL_COMPID_DIV1,
+       PLL_COMPID_MAX,
 };
 
 /*
@@ -165,7 +166,7 @@ static struct sama7g5_pll {
        u8 t;
        u8 eid;
        u8 safe_div;
-} sama7g5_plls[][PLL_ID_MAX] = {
+} sama7g5_plls[][PLL_COMPID_MAX] = {
        [PLL_ID_CPU] = {
                [PLL_COMPID_FRAC] = {
                        .n = "cpupll_fracck",
@@ -1038,7 +1039,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
        sama7g5_pmc->chws[PMC_MAIN] = hw;
 
        for (i = 0; i < PLL_ID_MAX; i++) {
-               for (j = 0; j < 3; j++) {
+               for (j = 0; j < PLL_COMPID_MAX; j++) {
                        struct clk_hw *parent_hw;
 
                        if (!sama7g5_plls[i][j].n)