S/390: Fix optimized mem* running on 31 bit kernels.

diff --git a/ChangeLog b/ChangeLog
index c69a7c4c6f100d9607fe08c33d294558bd104cc8..b978444773fc3f32f80995a980512512830c3903 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,14 @@
+2012-09-06  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
+
+       * sysdeps/s390/s390-32/multiarch/Makefile: Remove -mzarch
+       assembler flag.
+       * sysdeps/s390/s390-32/multiarch/memcmp.S: Use .machinemode
+       zarch_nohighgprs around the zarch optimized routines.
+       * sysdeps/s390/s390-32/multiarch/memcpy.S: Likewise.
+       * sysdeps/s390/s390-32/multiarch/memset.S: Likewise.
+       * sysdeps/s390/s390-32/multiarch/ifunc-resolve.c: Explicitly check
+       for zarch.
+
 2012-09-05  David S. Miller  <davem@davemloft.net>
 
        * sysdeps/sparc/fpu/libm-test-ulps: Update.

diff --git a/sysdeps/s390/s390-32/multiarch/Makefile b/sysdeps/s390/s390-32/multiarch/Makefile
index 5b0cd49c723bbf18247854a8088fcd8483060baf..9baeecda6476b6e13682712a6d7cdda52463c286 100644 (file)
--- a/sysdeps/s390/s390-32/multiarch/Makefile
+++ b/sysdeps/s390/s390-32/multiarch/Makefile
@@ -1,9 +1,3 @@
-ASFLAGS-.o += -Wa,-mzarch
-ASFLAGS-.os += -Wa,-mzarch
-ASFLAGS-.op += -Wa,-mzarch
-ASFLAGS-.og += -Wa,-mzarch
-ASFLAGS-.ob += -Wa,-mzarch
-ASFLAGS-.oS += -Wa,-mzarch
 ifeq ($(subdir),string)
 sysdep_routines += ifunc-resolve memset memcpy memcmp
 endif

diff --git a/sysdeps/s390/s390-32/multiarch/ifunc-resolve.c b/sysdeps/s390/s390-32/multiarch/ifunc-resolve.c
index 6a86c03c25f6a47c905c6ab0bd3b9596803d49b9..f1bf8a3dc440445c58b5c7545ba2e976b31372b5 100644 (file)
--- a/sysdeps/s390/s390-32/multiarch/ifunc-resolve.c
+++ b/sysdeps/s390/s390-32/multiarch/ifunc-resolve.c
@@ -41,7 +41,8 @@
   void *resolve_##FUNC (unsigned long int dl_hwcap)                    \
   {                                                                    \
     if ((dl_hwcap & HWCAP_S390_STFLE)                                  \
-       && (dl_hwcap & HWCAP_S390_HIGH_GPRS)) /* Implies zarch */       \
+       && (dl_hwcap & HWCAP_S390_ZARCH)                                \
+       && (dl_hwcap & HWCAP_S390_HIGH_GPRS))                           \
       {                                                                        \
        /* We want just 1 double word to be returned.  */               \
        register unsigned long reg0 asm("0") = 0;                       \

diff --git a/sysdeps/s390/s390-32/multiarch/memcmp.S b/sysdeps/s390/s390-32/multiarch/memcmp.S
index cd8ea86b0c7fd3adb6c4545b25e21a3d6941371d..9ca88911c85dbbc9370ea57a09684480a5c4b831 100644 (file)
--- a/sysdeps/s390/s390-32/multiarch/memcmp.S
+++ b/sysdeps/s390/s390-32/multiarch/memcmp.S
@@ -31,6 +31,7 @@
 
 ENTRY(memcmp_z196)
        .machine "z196"
+       .machinemode "zarch_nohighgprs"
         ltr     %r4,%r4
         je      .L_Z196_4
         ahi     %r4,-1
@@ -64,6 +65,7 @@ END(memcmp_z196)
 
 ENTRY(memcmp_z10)
        .machine "z10"
+       .machinemode "zarch_nohighgprs"
         ltr     %r4,%r4
         je      .L_Z10_4
         ahi     %r4,-1

diff --git a/sysdeps/s390/s390-32/multiarch/memcpy.S b/sysdeps/s390/s390-32/multiarch/memcpy.S
index 40f4acfbb6f99619babe7be71b8dd553646c5dcb..7b85602aa32b89a8deb760299c61c4e67d0e9b24 100644 (file)
--- a/sysdeps/s390/s390-32/multiarch/memcpy.S
+++ b/sysdeps/s390/s390-32/multiarch/memcpy.S
@@ -31,6 +31,7 @@
 
 ENTRY(memcpy_z196)
        .machine "z196"
+       .machinemode "zarch_nohighgprs"
         llgfr   %r4,%r4
         ltgr    %r4,%r4
         je      .L_Z196_4
@@ -61,6 +62,7 @@ END(memcpy_z196)
 
 ENTRY(memcpy_z10)
        .machine "z10"
+       .machinemode "zarch_nohighgprs"
         llgfr   %r4,%r4
         cgije   %r4,0,.L_Z10_4
         aghi    %r4,-1

diff --git a/sysdeps/s390/s390-32/multiarch/memset.S b/sysdeps/s390/s390-32/multiarch/memset.S
index 5ce7b4de83a2849767e73da9f1528d01a0f82e1e..ba43d671c20a9dfa01c8db70a8b84e3e2cd5c350 100644 (file)
--- a/sysdeps/s390/s390-32/multiarch/memset.S
+++ b/sysdeps/s390/s390-32/multiarch/memset.S
@@ -31,6 +31,7 @@
 
 ENTRY(memset_z196)
        .machine "z196"
+       .machinemode "zarch_nohighgprs"
         llgfr   %r4,%r4
         ltgr    %r4,%r4
         je      .L_Z196_4
@@ -62,6 +63,7 @@ END(memset_z196)
 
 ENTRY(memset_z10)
        .machine "z10"
+       .machinemode "zarch_nohighgprs"
         llgfr   %r4,%r4
         cgije   %r4,0,.L_Z10_4
         stc     %r3,0(%r2)