]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
xilinx: Remove simple-bus description from mini configurations
authorMichal Simek <michal.simek@amd.com>
Fri, 27 Jun 2025 09:20:40 +0000 (11:20 +0200)
committerMichal Simek <michal.simek@amd.com>
Tue, 8 Jul 2025 12:58:43 +0000 (14:58 +0200)
simple bus node and drivers not bringing up any value for mini
configuration that's why remove it and disable drivers for it to save some
space.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a51b11fa21c504a19701ebdccc1e61e899e1aed5.1751016029.git.michal.simek@amd.com
31 files changed:
arch/arm/dts/versal-mini-emmc0.dts
arch/arm/dts/versal-mini-emmc1.dts
arch/arm/dts/versal-mini-ospi.dtsi
arch/arm/dts/versal-mini-qspi.dtsi
arch/arm/dts/versal-net-mini-emmc.dts
arch/arm/dts/versal-net-mini-ospi.dtsi
arch/arm/dts/versal-net-mini-qspi.dtsi
arch/arm/dts/versal-net-mini.dts
arch/arm/dts/zynqmp-mini-emmc0.dts
arch/arm/dts/zynqmp-mini-emmc1.dts
arch/arm/dts/zynqmp-mini-nand.dts
arch/arm/dts/zynqmp-mini-qspi.dts
configs/amd_versal2_mini_defconfig
configs/amd_versal2_mini_emmc_defconfig
configs/amd_versal2_mini_ospi_defconfig
configs/amd_versal2_mini_qspi_defconfig
configs/xilinx_versal_mini_defconfig
configs/xilinx_versal_mini_emmc0_defconfig
configs/xilinx_versal_mini_emmc1_defconfig
configs/xilinx_versal_mini_ospi_defconfig
configs/xilinx_versal_mini_qspi_defconfig
configs/xilinx_versal_net_mini_defconfig
configs/xilinx_versal_net_mini_emmc_defconfig
configs/xilinx_versal_net_mini_ospi_defconfig
configs/xilinx_versal_net_mini_qspi_defconfig
configs/xilinx_zynqmp_mini_defconfig
configs/xilinx_zynqmp_mini_emmc0_defconfig
configs/xilinx_zynqmp_mini_emmc1_defconfig
configs/xilinx_zynqmp_mini_nand_defconfig
configs/xilinx_zynqmp_mini_nand_single_defconfig
configs/xilinx_zynqmp_mini_qspi_defconfig

index 179060c56eeeddc2a86bf5f38a7efd34f9ca63fc..9044ef1889bb0e1c54c8e33b8f94a2143c63a9cc 100644 (file)
                bootph-all;
        };
 
-       amba: axi {
-               bootph-all;
-               compatible = "simple-bus";
-               #address-cells = <0x2>;
-               #size-cells = <0x2>;
-               ranges;
-
-               sdhci0: sdhci@f1040000 {
-                       compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a";
-                       status = "okay";
-                       non-removable;
-                       disable-wp;
-                       no-sd;
-                       no-sdio;
-                       cap-mmc-hw-reset;
-                       bus-width = <8>;
-                       reg = <0x0 0xf1040000 0x0 0x10000>;
-                       clock-names = "clk_xin", "clk_ahb";
-                       clocks = <&clk200 &clk200>;
-                       no-1-8-v;
-                       xlnx,mio-bank = <0>;
-               };
+       sdhci0: sdhci@f1040000 {
+               compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a";
+               status = "okay";
+               non-removable;
+               disable-wp;
+               no-sd;
+               no-sdio;
+               cap-mmc-hw-reset;
+               bus-width = <8>;
+               reg = <0x0 0xf1040000 0x0 0x10000>;
+               clock-names = "clk_xin", "clk_ahb";
+               clocks = <&clk200 &clk200>;
+               no-1-8-v;
+               xlnx,mio-bank = <0>;
        };
 
        aliases {
index ffcc33345296598e5b03800d9255db1660428f65..47f3b74c0655ed6ca464cead81b21219cada9a38 100644 (file)
                bootph-all;
        };
 
-       amba: axi {
-               bootph-all;
-               compatible = "simple-bus";
-               #address-cells = <0x2>;
-               #size-cells = <0x2>;
-               ranges;
-
-               sdhci1: sdhci@f1050000 {
-                       compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a";
-                       status = "okay";
-                       non-removable;
-                       disable-wp;
-                       no-sd;
-                       no-sdio;
-                       cap-mmc-hw-reset;
-                       bus-width = <8>;
-                       reg = <0x0 0xf1050000 0x0 0x10000>;
-                       clock-names = "clk_xin", "clk_ahb";
-                       clocks = <&clk200 &clk200>;
-                       no-1-8-v;
-                       xlnx,mio-bank = <0>;
-               };
+       sdhci1: sdhci@f1050000 {
+               compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a";
+               status = "okay";
+               non-removable;
+               disable-wp;
+               no-sd;
+               no-sdio;
+               cap-mmc-hw-reset;
+               bus-width = <8>;
+               reg = <0x0 0xf1050000 0x0 0x10000>;
+               clock-names = "clk_xin", "clk_ahb";
+               clocks = <&clk200 &clk200>;
+               no-1-8-v;
+               xlnx,mio-bank = <0>;
        };
 
        aliases {
index 9ca0cf3c027f0a3792867a437b0a621ab0067230..eec2a08e7c70b49627e716ed6dc0efd95b45b527 100644 (file)
                bootph-all;
        };
 
-       amba: axi {
-               bootph-all;
-               compatible = "simple-bus";
-               #address-cells = <0x2>;
-               #size-cells = <0x2>;
-               ranges;
-
-               ospi: spi@f1010000 {
-                       compatible = "cdns,qspi-nor";
-                       status = "okay";
-                       reg = <0 0xf1010000 0 0x10000 0 0xc0000000 0 0x20000000>;
-                       clock-names = "ref_clk", "pclk";
-                       clocks = <&clk125 &clk125>;
-                       bus-num = <2>;
-                       num-cs = <1>;
-                       cdns,fifo-depth = <256>;
-                       cdns,fifo-width = <4>;
-                       cdns,is-dma = <1>;
-                       cdns,trigger-address = <0xc0000000>;
-                       #address-cells = <1>;
-                       #size-cells = <0>;
+       ospi: spi@f1010000 {
+               compatible = "cdns,qspi-nor";
+               status = "okay";
+               reg = <0 0xf1010000 0 0x10000 0 0xc0000000 0 0x20000000>;
+               clock-names = "ref_clk", "pclk";
+               clocks = <&clk125 &clk125>;
+               bus-num = <2>;
+               num-cs = <1>;
+               cdns,fifo-depth = <256>;
+               cdns,fifo-width = <4>;
+               cdns,is-dma = <1>;
+               cdns,trigger-address = <0xc0000000>;
+               #address-cells = <1>;
+               #size-cells = <0>;
 
-                       flash0: flash@0 {
-                               compatible = "n25q512a", "micron,m25p80",
-                                            "jedec,spi-nor";
-                               reg = <0x0>;
-                               spi-tx-bus-width = <8>;
-                               spi-rx-bus-width = <8>;
-                               spi-max-frequency = <20000000>;
-                               no-wp;
-                       };
+               flash0: flash@0 {
+                       compatible = "n25q512a", "micron,m25p80",
+                                    "jedec,spi-nor";
+                       reg = <0x0>;
+                       spi-tx-bus-width = <8>;
+                       spi-rx-bus-width = <8>;
+                       spi-max-frequency = <20000000>;
+                       no-wp;
                };
        };
 
index 57427e099f9e8aa009e6ccb30c2f75bef6be2a65..ec4eef74020b4920015d6767aa2bd93e650a5424 100644 (file)
                bootph-all;
        };
 
-       amba: axi {
-               bootph-all;
-               compatible = "simple-bus";
-               #address-cells = <0x2>;
-               #size-cells = <0x2>;
-               ranges;
-
-               qspi: spi@f1030000 {
-                       compatible = "xlnx,versal-qspi-1.0";
-                       status = "okay";
-                       clock-names = "ref_clk", "pclk";
-                       num-cs = <0x1>;
-                       reg = <0x0 0xf1030000 0x0 0x1000>;
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       clocks = <&clk150 &clk150>;
+       qspi: spi@f1030000 {
+               compatible = "xlnx,versal-qspi-1.0";
+               status = "okay";
+               clock-names = "ref_clk", "pclk";
+               num-cs = <0x1>;
+               reg = <0x0 0xf1030000 0x0 0x1000>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&clk150 &clk150>;
 
-                       flash0: flash@0 {
-                               compatible = "n25q512a", "micron,m25p80",
-                                            "jedec,spi-nor";
-                               reg = <0x0>;
-                               spi-tx-bus-width = <4>;
-                               spi-rx-bus-width = <4>;
-                               spi-max-frequency = <20000000>;
-                       };
+               flash0: flash@0 {
+                       compatible = "n25q512a", "micron,m25p80",
+                                    "jedec,spi-nor";
+                       reg = <0x0>;
+                       spi-tx-bus-width = <4>;
+                       spi-rx-bus-width = <4>;
+                       spi-max-frequency = <20000000>;
                };
        };
 
index 20e4e2994048e6ed4e09506b0a4b89aa9019f100..567ceeb36a0bd2ee6bdd6f68a6e3ea5badd23a4f 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * dts file for Xilinx Versal NET Mini eMMC Configuration
  *
- * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ * (C) Copyright 2023-2025, Advanced Micro Devices, Inc.
  *
  * Michal Simek <michal.simek@amd.com>
  * Ashok Reddy Soma <ashok.reddy.soma@amd.com>
                bootph-all;
        };
 
-       amba: axi {
-               bootph-all;
-               compatible = "simple-bus";
-               #address-cells = <2>;
-               #size-cells = <2>;
-               ranges;
-
-               sdhci1: mmc@f1050000 {
-                       compatible = "xlnx,versal-net-emmc";
-                       status = "okay";
-                       non-removable;
-                       disable-wp;
-                       no-sd;
-                       no-sdio;
-                       cap-mmc-hw-reset;
-                       bus-width = <8>;
-                       reg = <0 0xf1050000 0 0x10000>;
-                       clock-names = "clk_xin", "clk_ahb";
-                       clocks = <&clk200>, <&clk200>;
-                       xlnx,mio-bank = <0>;
-               };
+       sdhci1: mmc@f1050000 {
+               compatible = "xlnx,versal-net-emmc";
+               status = "okay";
+               non-removable;
+               disable-wp;
+               no-sd;
+               no-sdio;
+               cap-mmc-hw-reset;
+               bus-width = <8>;
+               reg = <0 0xf1050000 0 0x10000>;
+               clock-names = "clk_xin", "clk_ahb";
+               clocks = <&clk200>, <&clk200>;
+               xlnx,mio-bank = <0>;
        };
 };
index a9bf7cc42484ab4076f5953040705160e9d75ef8..1c94b352dc97b07f83ef8b465ccc0a271a65cd8f 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * dts file for Xilinx Versal NET Mini OSPI Configuration
  *
- * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ * (C) Copyright 2023-2025, Advanced Micro Devices, Inc.
  *
  * Michal Simek <michal.simek@amd.com>
  * Ashok Reddy Soma <ashok.reddy.soma@amd.com>
                bootph-all;
        };
 
-       amba: axi {
-               bootph-all;
-               compatible = "simple-bus";
-               #address-cells = <0x2>;
-               #size-cells = <0x2>;
-               ranges;
-
-               ospi: spi@f1010000 {
-                       compatible = "cdns,qspi-nor";
-                       status = "okay";
-                       reg = <0 0xf1010000 0 0x10000>, <0 0xc0000000 0 0x20000000>;
-                       clock-names = "ref_clk", "pclk";
-                       clocks = <&clk125>, <&clk125>;
-                       bus-num = <2>;
-                       num-cs = <1>;
-                       cdns,fifo-depth = <256>;
-                       cdns,fifo-width = <4>;
-                       cdns,is-dma = <1>;
-                       cdns,is-stig-pgm = <1>;
-                       cdns,trigger-address = <0xc0000000>;
-                       #address-cells = <1>;
-                       #size-cells = <0>;
+       ospi: spi@f1010000 {
+               compatible = "cdns,qspi-nor";
+               status = "okay";
+               reg = <0 0xf1010000 0 0x10000>, <0 0xc0000000 0 0x20000000>;
+               clock-names = "ref_clk", "pclk";
+               clocks = <&clk125>, <&clk125>;
+               bus-num = <2>;
+               num-cs = <1>;
+               cdns,fifo-depth = <256>;
+               cdns,fifo-width = <4>;
+               cdns,is-dma = <1>;
+               cdns,is-stig-pgm = <1>;
+               cdns,trigger-address = <0xc0000000>;
+               #address-cells = <1>;
+               #size-cells = <0>;
 
-                       flash0: flash@0 {
-                               compatible = "mt35xu02g", "micron,m25p80",
-                                            "jedec,spi-nor";
-                               reg = <0>;
-                               spi-tx-bus-width = <8>;
-                               spi-rx-bus-width = <8>;
-                               spi-max-frequency = <20000000>;
-                               no-wp;
-                       };
+               flash0: flash@0 {
+                       compatible = "mt35xu02g", "micron,m25p80",
+                                    "jedec,spi-nor";
+                       reg = <0>;
+                       spi-tx-bus-width = <8>;
+                       spi-rx-bus-width = <8>;
+                       spi-max-frequency = <20000000>;
+                       no-wp;
                };
        };
 };
index e29a3f36d6e407a68eb45bf9afbd8fb29287b3b3..97cc39c73e0da977b5068e497af012674a813f0b 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * dts file for Xilinx Versal NET Mini QSPI Configuration
  *
- * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ * (C) Copyright 2023-2025, Advanced Micro Devices, Inc.
  *
  * Michal Simek <michal.simek@amd.com>
  * Ashok Reddy Soma <ashok.reddy.soma@amd.com>
                bootph-all;
        };
 
-       amba: axi {
-               bootph-all;
-               compatible = "simple-bus";
-               #address-cells = <2>;
-               #size-cells = <2>;
-               ranges;
-
-               qspi: spi@f1030000 {
-                       compatible = "xlnx,versal-qspi-1.0";
-                       status = "okay";
-                       clock-names = "ref_clk", "pclk";
-                       num-cs = <1>;
-                       reg = <0 0xf1030000 0 0x1000>;
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       clocks = <&clk150>, <&clk150>;
+       qspi: spi@f1030000 {
+               compatible = "xlnx,versal-qspi-1.0";
+               status = "okay";
+               clock-names = "ref_clk", "pclk";
+               num-cs = <1>;
+               reg = <0 0xf1030000 0 0x1000>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&clk150>, <&clk150>;
 
-                       flash0: flash@0 {
-                               compatible = "n25q512a", "micron,m25p80",
-                                            "jedec,spi-nor";
-                               reg = <0>;
-                               spi-tx-bus-width = <4>;
-                               spi-rx-bus-width = <4>;
-                               spi-max-frequency = <20000000>;
-                       };
+               flash0: flash@0 {
+                       compatible = "n25q512a", "micron,m25p80",
+                                    "jedec,spi-nor";
+                       reg = <0>;
+                       spi-tx-bus-width = <4>;
+                       spi-rx-bus-width = <4>;
+                       spi-max-frequency = <20000000>;
                };
        };
 };
index f98f95a5c2fcd2c621aac184be0b3f209c962a7f..0f0a82e3aa3fbaacd250cfad1bdf47f21e0511f8 100644 (file)
@@ -3,7 +3,7 @@
  * dts file for Xilinx Versal NET
  *
  * Copyright (C) 2021 - 2022, Xilinx, Inc.
- * Copyright (C) 2022, Advanced Micro Devices, Inc.
+ * Copyright (C) 2022-2025, Advanced Micro Devices, Inc.
  *
  * Michal Simek <michal.simek@amd.com>
  */
                bootph-all;
        };
 
-       amba: axi {
-               compatible = "simple-bus";
+       serial0: serial@f1920000 {
                bootph-all;
-               #address-cells = <2>;
-               #size-cells = <2>;
-               ranges;
-
-               serial0: serial@f1920000 {
-                       bootph-all;
-                       compatible = "arm,pl011", "arm,primecell";
-                       reg = <0 0xf1920000 0 0x1000>;
-                       reg-io-width = <4>;
-                       clock-names = "uartclk", "apb_pclk";
-                       clocks = <&clk1>, <&clk1>;
-                       clock = <1000000>;
-                       skip-init;
-               };
+               compatible = "arm,pl011", "arm,primecell";
+               reg = <0 0xf1920000 0 0x1000>;
+               reg-io-width = <4>;
+               clock-names = "uartclk", "apb_pclk";
+               clocks = <&clk1>, <&clk1>;
+               clock = <1000000>;
+               skip-init;
        };
 };
index ad4b3c5f8b1dbbf17f12a8e602a82917b3c7dbc5..05f61d6bb35924cc74834c08e7f6a9b4577093f8 100644 (file)
                clock-frequency = <200000000>;
        };
 
-       amba: axi {
-               compatible = "simple-bus";
-               #address-cells = <2>;
-               #size-cells = <2>;
-               ranges;
-
-               sdhci0: mmc@ff160000 {
-                       bootph-all;
-                       compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
-                       status = "disabled";
-                       non-removable;
-                       no-sd;
-                       no-sdio;
-                       cap-mmc-hw-reset;
-                       bus-width = <8>;
-                       reg = <0x0 0xff160000 0x0 0x1000>;
-                       clock-names = "clk_xin", "clk_ahb";
-                       clocks = <&clk_xin &clk_xin>;
-               };
+       sdhci0: mmc@ff160000 {
+               bootph-all;
+               compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
+               status = "disabled";
+               non-removable;
+               no-sd;
+               no-sdio;
+               cap-mmc-hw-reset;
+               bus-width = <8>;
+               reg = <0x0 0xff160000 0x0 0x1000>;
+               clock-names = "clk_xin", "clk_ahb";
+               clocks = <&clk_xin &clk_xin>;
        };
 };
 
index fd421b4fe7eddcaac8ba67d81178dac1aa623989..7857106260e1c2cf55da76b7f4413c372c9643a1 100644 (file)
                clock-frequency = <200000000>;
        };
 
-       amba: axi {
-               compatible = "simple-bus";
-               #address-cells = <2>;
-               #size-cells = <2>;
-               ranges;
-
-               sdhci1: mmc@ff170000 {
-                       bootph-all;
-                       compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
-                       status = "disabled";
-                       non-removable;
-                       no-sd;
-                       no-sdio;
-                       cap-mmc-hw-reset;
-                       bus-width = <8>;
-                       reg = <0x0 0xff170000 0x0 0x1000>;
-                       clock-names = "clk_xin", "clk_ahb";
-                       clocks = <&clk_xin &clk_xin>;
-               };
+       sdhci1: mmc@ff170000 {
+               bootph-all;
+               compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
+               status = "disabled";
+               non-removable;
+               no-sd;
+               no-sdio;
+               cap-mmc-hw-reset;
+               bus-width = <8>;
+               reg = <0x0 0xff170000 0x0 0x1000>;
+               clock-names = "clk_xin", "clk_ahb";
+               clocks = <&clk_xin &clk_xin>;
        };
 };
 
index 5e2135158cd550d73777f14b62e39c7b0da96c71..1ece39997912c77f0f7bf777b54790019e42ff33 100644 (file)
                bootph-all;
        };
 
-       amba: axi {
-               compatible = "simple-bus";
-               #address-cells = <2>;
-               #size-cells = <1>;
-               ranges;
-
-               nand0: nand@ff100000 {
-                       compatible = "arasan,nfc-v3p10";
-                       status = "okay";
-                       reg = <0x0 0xff100000 0x1000>;
-                       clock-names = "clk_sys", "clk_flash";
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       arasan,has-mdma;
-                       num-cs = <2>;
-                       nand@0 {
-                               reg = <0>;
-                               #address-cells = <2>;
-                               #size-cells = <1>;
-                               nand-ecc-mode = "hw";
-                       };
+       nand0: nand@ff100000 {
+               compatible = "arasan,nfc-v3p10";
+               status = "okay";
+               reg = <0x0 0xff100000 0x1000>;
+               clock-names = "clk_sys", "clk_flash";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               arasan,has-mdma;
+               num-cs = <2>;
+               nand@0 {
+                       reg = <0>;
+                       #address-cells = <2>;
+                       #size-cells = <1>;
+                       nand-ecc-mode = "hw";
                };
        };
 };
index 917603dec61d1d2114467c6c8f14bb7626e7c715..ddcc39b4e9425093e842bf38a160f931bde823df 100644 (file)
                clock-frequency = <125000000>;
        };
 
-       amba: axi {
-               compatible = "simple-bus";
-               #address-cells = <2>;
-               #size-cells = <1>;
-               ranges;
-
-               qspi: spi@ff0f0000 {
-                       compatible = "xlnx,zynqmp-qspi-1.0";
-                       status = "disabled";
-                       clock-names = "ref_clk", "pclk";
-                       clocks = <&misc_clk &misc_clk>;
-                       num-cs = <1>;
-                       reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-               };
+       qspi: spi@ff0f0000 {
+               compatible = "xlnx,zynqmp-qspi-1.0";
+               status = "disabled";
+               clock-names = "ref_clk", "pclk";
+               clocks = <&misc_clk &misc_clk>;
+               num-cs = <1>;
+               reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
+               #address-cells = <1>;
+               #size-cells = <0>;
        };
 };
 
index e1c5d9b7fb99eb11d8741ddd844f02593557bc72..181866ba6973a8a18c63b2f3478f82cac28c7c75 100644 (file)
@@ -63,6 +63,7 @@ CONFIG_OF_EMBED=y
 CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_SIMPLE_BUS is not set
 # CONFIG_GPIO is not set
 # CONFIG_I2C is not set
 # CONFIG_INPUT is not set
index 42bab43a72b1d7e5dbbc8a8579905ca4d54ceb85..1c5fe4b84ce5f44fd65177183e0e05782eeaa327 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_OF_EMBED=y
 CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_SIMPLE_BUS is not set
 CONFIG_MMC_HS200_SUPPORT=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
index c2934625f2ef8c63f2d419264ed60b9e78e68125..5d3d0fb5231a8f4841b4f712dad7879fd9e9312f 100644 (file)
@@ -57,6 +57,7 @@ CONFIG_OF_EMBED=y
 CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_SIMPLE_BUS is not set
 # CONFIG_GPIO is not set
 # CONFIG_I2C is not set
 # CONFIG_INPUT is not set
index 1c61ae821a95665e202529165d641c818e68a6a2..a9fb217b286f0a71e32497fa1513ee5f579acd57 100644 (file)
@@ -57,6 +57,7 @@ CONFIG_OF_EMBED=y
 CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_SIMPLE_BUS is not set
 # CONFIG_GPIO is not set
 # CONFIG_I2C is not set
 # CONFIG_INPUT is not set
index 605a30b9987a9a4804ac9967cac88c68eaeceb6d..296c404d15ab25c22751dff056f0eedcd51f8db1 100644 (file)
@@ -60,6 +60,7 @@ CONFIG_SYS_ALT_MEMTEST=y
 CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_SIMPLE_BUS is not set
 # CONFIG_MMC is not set
 CONFIG_ARM_DCC=y
 # CONFIG_GZIP is not set
index 90d6abd490e68994a6fb960b0a08908857b18a8d..36bd519af0c576233e5c44e3393fb72d0af189e3 100644 (file)
@@ -59,6 +59,7 @@ CONFIG_OF_EMBED=y
 CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_SIMPLE_BUS is not set
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_ARM_DCC=y
index df6a41650156d3545e2193a6a5a6aec328356164..630f328e69ea2bf203a0305171d8e413bbb1ab3f 100644 (file)
@@ -59,6 +59,7 @@ CONFIG_OF_EMBED=y
 CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_SIMPLE_BUS is not set
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_ARM_DCC=y
index af9ce49916905a88665f0b6e90d998c0594dc19e..cac691c92ceee9b360f7237511dc59e484607548 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_SYS_PROMPT="Versal> "
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_SIMPLE_BUS is not set
 # CONFIG_MMC is not set
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
index ecb3b16033cb9329093828643f7b393dcb77d45f..220daa894ea06a7b90d07464c217d76bf1535d0b 100644 (file)
@@ -56,6 +56,7 @@ CONFIG_SYS_PROMPT="Versal> "
 # CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_SIMPLE_BUS is not set
 # CONFIG_GPIO is not set
 # CONFIG_I2C is not set
 # CONFIG_INPUT is not set
index 7cae88b0d9f60d0e07faf81456515956fc295484..b0f4128932ce990a2c0b5f5b65f21bbedaa4abc5 100644 (file)
@@ -64,6 +64,7 @@ CONFIG_OF_EMBED=y
 CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_SIMPLE_BUS is not set
 # CONFIG_GPIO is not set
 # CONFIG_I2C is not set
 # CONFIG_INPUT is not set
index 30f4885d1492537fea28e1fa006516e9ec4d1964..1f8fb162c9767f0f9591a027e38f6e6fb095ed8d 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_OF_EMBED=y
 CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_SIMPLE_BUS is not set
 CONFIG_MMC_HS200_SUPPORT=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
index 18ec737225867484c8277efad9bfc5baeb1584a3..a8d0c5fc1287150d826916549e5bb7d8058afac6 100644 (file)
@@ -53,6 +53,7 @@ CONFIG_SYS_PROMPT="Versal NET> "
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_SIMPLE_BUS is not set
 # CONFIG_MMC is not set
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
index 5241da6c63bb289c115b1dc9ff7573f88306e0c8..1a3df99f65edea98b3851237143ecbcccb2ec0a0 100644 (file)
@@ -55,6 +55,7 @@ CONFIG_SYS_PROMPT="Versal NET> "
 # CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_SIMPLE_BUS is not set
 # CONFIG_GPIO is not set
 # CONFIG_I2C is not set
 # CONFIG_INPUT is not set
index 736d4bd4efc1eead8e5882f7939c934cd9a68f00..d5c74e3761febfa25ff795f384063d938185e113 100644 (file)
@@ -56,6 +56,7 @@ CONFIG_OF_EMBED=y
 CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_SIMPLE_BUS is not set
 # CONFIG_DM_MAILBOX is not set
 # CONFIG_MMC is not set
 CONFIG_ARM_DCC=y
index 85a6af45c57b668b827bffda639672176f7e76e5..a43acfeab8f7cb357aaf3ea1078e0d89003fbb68 100644 (file)
@@ -71,6 +71,7 @@ CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
 CONFIG_SPL_DM_SEQ_ALIAS=y
+# CONFIG_SIMPLE_BUS is not set
 # CONFIG_DM_MAILBOX is not set
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_MMC_SDHCI=y
index 4c01a43b6e43b1487ae714cef5f0bfb83319f6be..85ec9c638a038aeb0fcf441eb36da7d340fe1529 100644 (file)
@@ -71,6 +71,7 @@ CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
 CONFIG_SPL_DM_SEQ_ALIAS=y
+# CONFIG_SIMPLE_BUS is not set
 # CONFIG_DM_MAILBOX is not set
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_MMC_SDHCI=y
index afb50a9ff431bf92d84dc7745a115c6f6db1cb8a..47830d047d18519c4f7cde35639590a5495accdf 100644 (file)
@@ -51,6 +51,7 @@ CONFIG_OF_EMBED=y
 CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_SIMPLE_BUS is not set
 # CONFIG_DM_MAILBOX is not set
 # CONFIG_MMC is not set
 CONFIG_DM_MTD=y
index a40a4493d5d2488b2782fb63a88d710f79079ac9..8270e689f7d9d9198e7a2a8485d4dff3a79da922 100644 (file)
@@ -51,6 +51,7 @@ CONFIG_OF_EMBED=y
 CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_SIMPLE_BUS is not set
 # CONFIG_DM_MAILBOX is not set
 # CONFIG_MMC is not set
 CONFIG_DM_MTD=y
index 0367c0435740fc945ecb001039d98c209c138744..193cc7d2722418ec9e6d805a07f62e64494608c6 100644 (file)
@@ -73,6 +73,7 @@ CONFIG_ENV_RELOC_GD_ENV_ADDR=y
 CONFIG_NO_NET=y
 # CONFIG_DM_DEVICE_REMOVE is not set
 CONFIG_SPL_DM_SEQ_ALIAS=y
+# CONFIG_SIMPLE_BUS is not set
 # CONFIG_FIRMWARE is not set
 # CONFIG_GPIO is not set
 # CONFIG_I2C is not set