]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: meson: fix PHY deassert timing requirements
authorStefan Agner <stefan@agner.ch>
Mon, 7 Dec 2020 17:58:00 +0000 (18:58 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 30 Dec 2020 10:51:20 +0000 (11:51 +0100)
[ Upstream commit c183c406c4321002fe85b345b51bc1a3a04b6d33 ]

According to the datasheet (Rev. 1.9) the RTL8211F requires at least
72ms "for internal circuits settling time" before accessing the PHY
registers. This fixes an issue seen on ODROID-C2 where the Ethernet
link doesn't come up when using ip link set down/up:
  [ 6630.714855] meson8b-dwmac c9410000.ethernet eth0: Link is Down
  [ 6630.785775] meson8b-dwmac c9410000.ethernet eth0: PHY [stmmac-0:00] driver [RTL8211F Gigabit Ethernet] (irq=36)
  [ 6630.893071] meson8b-dwmac c9410000.ethernet: Failed to reset the dma
  [ 6630.893800] meson8b-dwmac c9410000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed
  [ 6630.902835] meson8b-dwmac c9410000.ethernet eth0: stmmac_open: Hw setup failed

Fixes: f29cabf240ed ("arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings")
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/4a322c198b86e4c8b3dda015560a683babea4d63.1607363522.git.stefan@agner.ch
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts

index 233eb1cd7967153fa467e7600fd746301c8525a9..d94b695916a3574d8b73adb20ea9ea3694108cce 100644 (file)
                        reg = <0>;
 
                        reset-assert-us = <10000>;
-                       reset-deassert-us = <30000>;
+                       reset-deassert-us = <80000>;
                        reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                        interrupt-parent = <&gpio_intc>;
index b0b12e3898350f68b1397d16ee3e4b739c9a2b8f..8828acb3fd4c535144e7fb46b9fd950f3eb59f2a 100644 (file)
                        reg = <0>;
 
                        reset-assert-us = <10000>;
-                       reset-deassert-us = <30000>;
+                       reset-deassert-us = <80000>;
                        reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                        interrupt-parent = <&gpio_intc>;
index 43b11e3dfe1194883f3520af00fcd3196091a477..29976215e14460f75b832b94a8f9df6206de388f 100644 (file)
                        reg = <0>;
 
                        reset-assert-us = <10000>;
-                       reset-deassert-us = <30000>;
+                       reset-deassert-us = <80000>;
                        reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                        interrupt-parent = <&gpio_intc>;
index 4c539881fbb73f46fd2693a6a110161f718fe3a9..e3d17569d98ad15625726ffa69ff85154207cc9a 100644 (file)
                        reg = <0>;
 
                        reset-assert-us = <10000>;
-                       reset-deassert-us = <30000>;
+                       reset-deassert-us = <80000>;
                        reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
                };
        };
index b08c4537f260dbfc556f6252ed0f00e66713da55..b2ab05c2209031e3debce642869e325998b46818 100644 (file)
@@ -82,7 +82,7 @@
 
                /* External PHY reset is shared with internal PHY Led signal */
                reset-assert-us = <10000>;
-               reset-deassert-us = <30000>;
+               reset-deassert-us = <80000>;
                reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                interrupt-parent = <&gpio_intc>;
index fa8bd0690e89ac9f83b776659a99d70930bfdcaa..c8a4205117f156a80769e14b5d8fb670d0e49dd8 100644 (file)
                reg = <0>;
 
                reset-assert-us = <10000>;
-               reset-deassert-us = <30000>;
+               reset-deassert-us = <80000>;
                reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                interrupt-parent = <&gpio_intc>;
index c2bd4dbbf38c5408a2fbe3b34de0c4e8224d81cb..8dccf91d68da759fd4aa6aecdc0ebea82aee0fbc 100644 (file)
                max-speed = <1000>;
 
                reset-assert-us = <10000>;
-               reset-deassert-us = <30000>;
+               reset-deassert-us = <80000>;
                reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
        };
 };
index ea45ae0c71b7f16d00596453d13c628af25bd368..8edbfe040805c5169577d86e1b3d0adcc96ea10e 100644 (file)
@@ -64,7 +64,7 @@
 
                /* External PHY reset is shared with internal PHY Led signal */
                reset-assert-us = <10000>;
-               reset-deassert-us = <30000>;
+               reset-deassert-us = <80000>;
                reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
 
                interrupt-parent = <&gpio_intc>;
index 5cd4d35006d097951c045f00221e4a59a806774a..f72d29e33a9e49ee3830d9cc3329efa0bee72096 100644 (file)
                max-speed = <1000>;
 
                reset-assert-us = <10000>;
-               reset-deassert-us = <30000>;
+               reset-deassert-us = <80000>;
                reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
        };
 };