]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amd/pm: Remove unused logic in SMUv14.0.2
authorLijo Lazar <lijo.lazar@amd.com>
Mon, 19 Jan 2026 06:44:47 +0000 (12:14 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 29 Jan 2026 17:26:44 +0000 (12:26 -0500)
Remove commented and redundant logic in get_allowed_feature_mask
implementation.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c

index faae1da81bd4e4fb821088b94302a3648b8007a9..d2aa5fabfca4a7ac253a2f0db0f8692fbf0bae46 100644 (file)
@@ -268,50 +268,11 @@ static int
 smu_v14_0_2_get_allowed_feature_mask(struct smu_context *smu,
                                  uint32_t *feature_mask, uint32_t num)
 {
-       struct amdgpu_device *adev = smu->adev;
-       /*u32 smu_version;*/
-
        if (num > 2)
                return -EINVAL;
 
        memset(feature_mask, 0xff, sizeof(uint32_t) * num);
 
-       if (adev->pm.pp_feature & PP_SCLK_DPM_MASK) {
-               *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT);
-               *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_IMU_BIT);
-       }
-#if 0
-       if (!(adev->pg_flags & AMD_PG_SUPPORT_ATHUB) ||
-           !(adev->pg_flags & AMD_PG_SUPPORT_MMHUB))
-               *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_ATHUB_MMHUB_PG_BIT);
-
-       if (!(adev->pm.pp_feature & PP_SOCCLK_DPM_MASK))
-               *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT);
-
-       /* PMFW 78.58 contains a critical fix for gfxoff feature */
-       smu_cmn_get_smc_version(smu, NULL, &smu_version);
-       if ((smu_version < 0x004e3a00) ||
-            !(adev->pm.pp_feature & PP_GFXOFF_MASK))
-               *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_GFXOFF_BIT);
-
-       if (!(adev->pm.pp_feature & PP_MCLK_DPM_MASK)) {
-               *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_DPM_UCLK_BIT);
-               *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_VMEMP_SCALING_BIT);
-               *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_VDDIO_MEM_SCALING_BIT);
-       }
-
-       if (!(adev->pm.pp_feature & PP_SCLK_DEEP_SLEEP_MASK))
-               *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_DS_GFXCLK_BIT);
-
-       if (!(adev->pm.pp_feature & PP_PCIE_DPM_MASK)) {
-               *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_DPM_LINK_BIT);
-               *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_DS_LCLK_BIT);
-       }
-
-       if (!(adev->pm.pp_feature & PP_ULV_MASK))
-               *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_GFX_ULV_BIT);
-#endif
-
        return 0;
 }