]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
x86: Enable 256 move by pieces for ALDERLAKE machine.
authorLili Cui <lili.cui@intel.com>
Thu, 17 Nov 2022 07:50:46 +0000 (15:50 +0800)
committerCui,Lili <lili.cui@intel.com>
Thu, 17 Nov 2022 08:27:34 +0000 (16:27 +0800)
gcc/ChangeLog:

* config/i386/x86-tune.def
(X86_TUNE_AVX256_MOVE_BY_PIECES): Add alderlake.
(X86_TUNE_AVX256_STORE_BY_PIECES): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/i386/pieces-memset-50.c: New test.

gcc/config/i386/x86-tune.def
gcc/testsuite/gcc.target/i386/pieces-memset-50.c [new file with mode: 0644]

index 58e29e7806a55929efbe92b67c8174eeb24f1911..cd66f3351137c31f8908d932a0fc31545f1f7491 100644 (file)
@@ -536,12 +536,12 @@ DEF_TUNE (X86_TUNE_AVX256_OPTIMAL, "avx256_optimal", m_CORE_AVX512)
 /* X86_TUNE_AVX256_MOVE_BY_PIECES: Optimize move_by_pieces with 256-bit
    AVX instructions.  */
 DEF_TUNE (X86_TUNE_AVX256_MOVE_BY_PIECES, "avx256_move_by_pieces",
-         m_CORE_AVX512)
+         m_ALDERLAKE | m_CORE_AVX2)
 
 /* X86_TUNE_AVX256_STORE_BY_PIECES: Optimize store_by_pieces with 256-bit
    AVX instructions.  */
 DEF_TUNE (X86_TUNE_AVX256_STORE_BY_PIECES, "avx256_store_by_pieces",
-         m_CORE_AVX512)
+         m_ALDERLAKE | m_CORE_AVX2)
 
 /* X86_TUNE_AVX512_MOVE_BY_PIECES: Optimize move_by_pieces with 512-bit
    AVX instructions.  */
diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-50.c b/gcc/testsuite/gcc.target/i386/pieces-memset-50.c
new file mode 100644 (file)
index 0000000..c09e7c3
--- /dev/null
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=alderlake" } */
+
+extern char *dst;
+
+void
+foo (int x)
+{
+  __builtin_memset (dst, x, 64);
+}
+
+/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 2 } } */