]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
mailbox: mediatek: cmdq: clear the event in cmdq initial flow
authorBibby Hsieh <bibby.hsieh@mediatek.com>
Thu, 29 Aug 2019 01:48:12 +0000 (09:48 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 7 Oct 2019 16:59:19 +0000 (18:59 +0200)
[ Upstream commit 6058f11870b8e6d4f5cc7b591097c00bf69a000d ]

GCE hardware stored event information in own internal sysram,
if the initial value in those sysram is not zero value
it will cause a situation that gce can wait the event immediately
after client ask gce to wait event but not really trigger the
corresponding hardware.

In order to make sure that the wait event function is
exactly correct, we need to clear the sysram value in
cmdq initial flow.

Fixes: 623a6143a845 ("mailbox: mediatek: Add Mediatek CMDQ driver")
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/mailbox/mtk-cmdq-mailbox.c
include/linux/mailbox/mtk-cmdq-mailbox.h
include/linux/soc/mediatek/mtk-cmdq.h

index 00d5219094e5dcde753d583e78b317bfe71b88e2..48bba491395237bc67aab85c9ae2851717b27da8 100644 (file)
@@ -22,6 +22,7 @@
 #define CMDQ_NUM_CMD(t)                        (t->cmd_buf_size / CMDQ_INST_SIZE)
 
 #define CMDQ_CURR_IRQ_STATUS           0x10
+#define CMDQ_SYNC_TOKEN_UPDATE         0x68
 #define CMDQ_THR_SLOT_CYCLES           0x30
 #define CMDQ_THR_BASE                  0x100
 #define CMDQ_THR_SIZE                  0x80
@@ -104,8 +105,12 @@ static void cmdq_thread_resume(struct cmdq_thread *thread)
 
 static void cmdq_init(struct cmdq *cmdq)
 {
+       int i;
+
        WARN_ON(clk_enable(cmdq->clock) < 0);
        writel(CMDQ_THR_ACTIVE_SLOT_CYCLES, cmdq->base + CMDQ_THR_SLOT_CYCLES);
+       for (i = 0; i <= CMDQ_MAX_EVENT; i++)
+               writel(i, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE);
        clk_disable(cmdq->clock);
 }
 
index ccb73422c2fa22de6e5b8221134eabe5351899c9..e6f54ef6698b1fe530e5d8fc6a690bc459a88051 100644 (file)
@@ -20,6 +20,9 @@
 #define CMDQ_WFE_WAIT                  BIT(15)
 #define CMDQ_WFE_WAIT_VALUE            0x1
 
+/** cmdq event maximum */
+#define CMDQ_MAX_EVENT                 0x3ff
+
 /*
  * CMDQ_CODE_MASK:
  *   set write mask
index 54ade13a9b15730b538236c907e79b78842c0035..4e8899972db4ddfa89321205efe08e1880284c27 100644 (file)
@@ -13,9 +13,6 @@
 
 #define CMDQ_NO_TIMEOUT                0xffffffffu
 
-/** cmdq event maximum */
-#define CMDQ_MAX_EVENT                         0x3ff
-
 struct cmdq_pkt;
 
 struct cmdq_client {