arm: improve tests and fix vclzq*

gcc/ChangeLog:

	* config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/mve/intrinsics/vclzq_m_s16.c: Use
	check-function-bodies instead of scan-assembler checks.  Use
	extern "C" for C++ testing.
	* gcc.target/arm/mve/intrinsics/vclzq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vclzq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vclzq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vclzq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vclzq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vclzq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vclzq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vclzq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vclzq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vclzq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vclzq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vclzq_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vclzq_x_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vclzq_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vclzq_x_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vclzq_x_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vclzq_x_u8.c: Likewise.
	* gcc.target/arm/simd/mve-vclz.c: Update test.

diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index d4f5a904892cf2cb1d9174312ff9221a11e181b1..2728537009106b38ccb949ba84c2ac25d040ac83 100644 (file)
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -448,7 +448,7 @@
        (clz:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")))
   ]
   "TARGET_HAVE_MVE"
-  "vclz.i%#<V_sz_elem>  %q0, %q1"
+  "vclz.i%#<V_sz_elem>\t%q0, %q1"
   [(set_attr "type" "mve_move")
 ])
 (define_expand "mve_vclzq_u<mode>"

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c
index 9670f8f56f3608ae356e468d585572d08eca74cf..620314e4ff27951975962812d90c18ef13508e72 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c
@@ -1,22 +1,49 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i16       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
 {
   return vclzq_m_s16 (inactive, a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i16       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
 {
   return vclzq_m (inactive, a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c
index 18427354570cee5ef5fcaf9f5932088f4a212c62..dfda1e67287d69b502f791bfdcab2bc332e3ac90 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c
@@ -1,22 +1,49 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i32       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
 {
   return vclzq_m_s32 (inactive, a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i32       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
 {
   return vclzq_m (inactive, a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c
index 2697d039d7080e8afaa1595eabe7934c4f657769..1300fe6f8c41d0de3da87d62580264a5b6b9e4a0 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c
@@ -1,22 +1,49 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i8        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
 {
   return vclzq_m_s8 (inactive, a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i8        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
 {
   return vclzq_m (inactive, a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c
index 8405b16314c8a2dfc935cf1d7f30c2cb36412d80..922819d388e41405599c932a86f7c34267b4b47e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c
@@ -1,22 +1,49 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i16       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint16x8_t
 foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
 {
   return vclzq_m_u16 (inactive, a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i16       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint16x8_t
 foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
 {
   return vclzq_m (inactive, a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c
index 350e6e7e661dabcb734e1c2e3edcb69ec3a912da..6e75a0463cf145bac5fb9f8ca0f0b2dc2a091dac 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c
@@ -1,22 +1,49 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i32       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint32x4_t
 foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
 {
   return vclzq_m_u32 (inactive, a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i32       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint32x4_t
 foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
 {
   return vclzq_m (inactive, a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c
index d455526f975995aac8733957fde7c0babb724e95..3c450e8eca0017b6a06c4a0b6bd4206f930cf772 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c
@@ -1,22 +1,49 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i8        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint8x16_t
 foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
 {
   return vclzq_m_u8 (inactive, a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i8        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint8x16_t
 foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
 {
   return vclzq_m (inactive, a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c
index f71a0a4ededfba0569ef801a4623885070e30891..17be53f395b3bb601310021590acb3e9fb4169ed 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c
@@ -1,21 +1,41 @@
-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vclz.i16        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t a)
 {
   return vclzq_s16 (a);
 }
 
-/* { dg-final { scan-assembler "vclz.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vclz.i16        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t a)
 {
   return vclzq (a);
 }
 
-/* { dg-final { scan-assembler "vclz.i16"  }  } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c
index 46a002bc1c516309cd728abd05206a322ed0d6e4..5e440febb295d75aacb69afb6111a916c037995d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c
@@ -1,21 +1,41 @@
-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vclz.i32        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t a)
 {
   return vclzq_s32 (a);
 }
 
-/* { dg-final { scan-assembler "vclz.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vclz.i32        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t a)
 {
   return vclzq (a);
 }
 
-/* { dg-final { scan-assembler "vclz.i32"  }  } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c
index 3cab6f323101388a0138bedbf991d710b4b09406..9eaa9a4269af3e13859632d78236b4cc7e24b887 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c
@@ -1,21 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vclz.i8 q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t a)
 {
   return vclzq_s8 (a);
 }
 
-/* { dg-final { scan-assembler "vclz.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vclz.i8 q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t a)
 {
   return vclzq (a);
 }
 
-/* { dg-final { scan-assembler "vclz.i8"  }  } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c
index cada68b6d65069160fee386ce6ebf19c48495579..37179b22a5c5a4ffaf1513e4710423d8c0ec2a61 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c
@@ -1,21 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vclz.i16        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint16x8_t
 foo (uint16x8_t a)
 {
-    return vclzq_u16 (a);
+  return vclzq_u16 (a);
 }
 
-/* { dg-final { scan-assembler "vclz.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vclz.i16        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint16x8_t
 foo1 (uint16x8_t a)
 {
-    return vclzq (a);
+  return vclzq (a);
+}
+
+#ifdef __cplusplus
 }
+#endif
 
-/* { dg-final { scan-assembler "vclz.i16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c
index 0291b0cea4cc41b8fffd401ffbbe9eb4eab86bac..65ee44d41d5225eca09c5a5c133a00c46a8ed243 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c
@@ -1,21 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vclz.i32        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint32x4_t
 foo (uint32x4_t a)
 {
-    return vclzq_u32 (a);
+  return vclzq_u32 (a);
 }
 
-/* { dg-final { scan-assembler "vclz.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vclz.i32        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint32x4_t
 foo1 (uint32x4_t a)
 {
-    return vclzq (a);
+  return vclzq (a);
+}
+
+#ifdef __cplusplus
 }
+#endif
 
-/* { dg-final { scan-assembler "vclz.i32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c
index 5eb7bab5e0df6531750c0141c9bb3923d499a5fe..bed4ab1878a7db1b2068e59beac53b719ce19325 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c
@@ -1,21 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vclz.i8 q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint8x16_t
 foo (uint8x16_t a)
 {
-    return vclzq_u8 (a);
+  return vclzq_u8 (a);
 }
 
-/* { dg-final { scan-assembler "vclz.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vclz.i8 q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint8x16_t
 foo1 (uint8x16_t a)
 {
-    return vclzq (a);
+  return vclzq (a);
+}
+
+#ifdef __cplusplus
 }
+#endif
 
-/* { dg-final { scan-assembler "vclz.i8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c
index daddd1b44213c4f7ef5456fbd02c988c4a118c13..ea78bf20066531a60ec6d8570643be64c17993df 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c
@@ -1,22 +1,49 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i16       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t a, mve_pred16_t p)
 {
   return vclzq_x_s16 (a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i16       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t a, mve_pred16_t p)
 {
   return vclzq_x (a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c
index d4f443f7f56491c970e9cd097174c70d31730c22..cc85d4d27e2284a22f5259f0e44164f492f98790 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c
@@ -1,22 +1,49 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i32       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t a, mve_pred16_t p)
 {
   return vclzq_x_s32 (a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i32       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t a, mve_pred16_t p)
 {
   return vclzq_x (a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c
index b33d2c51c3fb6ee5b3259bc94a698765a26b2b66..0f809167a4f813b4e38683e4212e2fe96d4726f4 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c
@@ -1,22 +1,49 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i8        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t a, mve_pred16_t p)
 {
   return vclzq_x_s8 (a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i8        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t a, mve_pred16_t p)
 {
   return vclzq_x (a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c
index 6d9bc79261bed1fdd6df79b3b7baa8d301bc2b1c..a9b662d40f29556447de8c3db98c2a83cec0d875 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c
@@ -1,22 +1,49 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i16       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint16x8_t
 foo (uint16x8_t a, mve_pred16_t p)
 {
   return vclzq_x_u16 (a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i16       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint16x8_t
 foo1 (uint16x8_t a, mve_pred16_t p)
 {
   return vclzq_x (a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c
index c3b053b9f1fe92f042d05536ff003e471a60df1b..5446938c3fd0cbfb8f8ffd76b719871072dbc511 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c
@@ -1,22 +1,49 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i32       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint32x4_t
 foo (uint32x4_t a, mve_pred16_t p)
 {
   return vclzq_x_u32 (a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i32       q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint32x4_t
 foo1 (uint32x4_t a, mve_pred16_t p)
 {
   return vclzq_x (a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c
index 678b2eb898d9a2593f83e2d59d0289d993a7a2ee..548a74e83674b170a9cc1361aaa2b2c5637d5ed5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c
@@ -1,22 +1,49 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i8        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint8x16_t
 foo (uint8x16_t a, mve_pred16_t p)
 {
   return vclzq_x_u8 (a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vclzt.i8        q[0-9]+, q[0-9]+(?:     @.*|)
+**     ...
+*/
 uint8x16_t
 foo1 (uint8x16_t a, mve_pred16_t p)
 {
   return vclzq_x (a, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c b/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c
index 7068736bc283ad51a97ae4a524f6c9a89373abfe..38e91fc5bcec6ae3d0b7a634aaf9b403c10769ff 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c
+++ b/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c
@@ -23,6 +23,6 @@ FUNC(u, uint, 8, clz)
 
 /* 16 and 8-bit versions are not vectorized because they need pack/unpack
    patterns since __builtin_clz uses 32-bit parameter and return value.  */
-/* { dg-final { scan-assembler-times {vclz\.i32  q[0-9]+, q[0-9]+} 2 } } */
-/* { dg-final { scan-assembler-times {vclz\.i16  q[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */
-/* { dg-final { scan-assembler-times {vclz\.i8  q[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */
+/* { dg-final { scan-assembler-times {vclz\.i32\tq[0-9]+, q[0-9]+} 2 } } */
+/* { dg-final { scan-assembler-times {vclz\.i16\tq[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */
+/* { dg-final { scan-assembler-times {vclz\.i8\tq[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */