drm/amdkfd: Set SDMA_QUEUEx_IB_CNTL/SWITCH_INSIDE_IB

    When submitting MQD to CP, set SDMA_QUEUEx_IB_CNTL/SWITCH_INSIDE_IB bit
    so it'll allow SDMA preemption if there is a massive command buffer of
    long-running SDMA commands.

Signed-off-by: Gang Ba <Gang.Ba@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12.c
index 565858b9044d46633351fd0292dcf1a607d21fbf..729df66ebfb3c058924c88d978c22f8253711f15 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12.c
@@ -351,6 +351,12 @@ static void update_mqd_sdma(struct mqd_manager *mm, void *mqd,
 
        m->sdmax_rlcx_dummy_reg = SDMA_RLC_DUMMY_DEFAULT;
 
+       /* Allow context switch so we don't cross-process starve with a massive
+       * command buffer of long-running SDMA commands
+       * sdmax_rlcx_ib_cntl represent SDMA_QUEUE0_IB_CNTL register
+       */
+       m->sdmax_rlcx_ib_cntl |= SDMA0_QUEUE0_IB_CNTL__SWITCH_INSIDE_IB_MASK;
+
        q->is_active = QUEUE_IS_ACTIVE(*q);
 }
 

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12_1.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12_1.c
index 06ecc86fcb4c32dc4c43ead9335a09b6e05677ba..9cc8a1ae88f9c9d5284be7fdfe5160bd6ddea9a7 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12_1.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12_1.c
@@ -363,6 +363,12 @@ static void update_mqd_sdma(struct mqd_manager *mm, void *mqd,
 
        m->sdmax_rlcx_dummy_reg = SDMA_RLC_DUMMY_DEFAULT;
 
+       /* Allow context switch so we don't cross-process starve with a massive
+       * command buffer of long-running SDMA commands
+       * sdmax_rlcx_ib_cntl represent SDMA_QUEUE0_IB_CNTL register
+       */
+       m->sdmax_rlcx_ib_cntl |= SDMA0_SDMA_QUEUE0_IB_CNTL__SWITCH_INSIDE_IB_MASK;
+
        q->is_active = QUEUE_IS_ACTIVE(*q);
 }