]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: qcom: sc: change labels to lower-case
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tue, 22 Oct 2024 15:47:31 +0000 (17:47 +0200)
committerBjorn Andersson <andersson@kernel.org>
Wed, 23 Oct 2024 00:13:49 +0000 (19:13 -0500)
DTS coding style expects labels to be lowercase.  No functional impact.
Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-6-0505bc7d2c56@linaro.org
[bjorn: Update sm7325 references to match the updated case]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
arch/arm64/boot/dts/qcom/sc7280.dtsi
arch/arm64/boot/dts/qcom/sc8180x.dtsi
arch/arm64/boot/dts/qcom/sm7325.dtsi

index eb5e32035d937c412847626d2f2b1814ba258a8d..8b4239f13748fe591b68a163f37993f9e84c2de0 100644 (file)
@@ -29,7 +29,7 @@
 / {
        cpus {
                domain_idle_states: domain-idle-states {
-                       CLUSTER_SLEEP_0: cluster-sleep-0 {
+                       cluster_sleep_0: cluster-sleep-0 {
                                compatible = "domain-idle-state";
                                arm,psci-suspend-param = <0x40003444>;
                                entry-latency-us = <2752>;
@@ -52,8 +52,8 @@
        };
 };
 
-&CLUSTER_PD {
-       domain-idle-states = <&CLUSTER_SLEEP_0>;
+&cluster_pd {
+       domain-idle-states = <&cluster_sleep_0>;
 };
 
 &gpu {
index 7c75340b3a46e609285e60c9246325b40e1383dc..77da825159b0ec2a9ac899697eb4f63d933d12b1 100644 (file)
                #address-cells = <2>;
                #size-cells = <0>;
 
-               CPU0: cpu@0 {
+               cpu0: cpu@0 {
                        device_type = "cpu";
                        compatible = "qcom,kryo";
                        reg = <0x0 0x0>;
                        clocks = <&cpufreq_hw 0>;
                        enable-method = "psci";
-                       power-domains = <&CPU_PD0>;
+                       power-domains = <&cpu_pd0>;
                        power-domain-names = "psci";
-                       next-level-cache = <&L2_0>;
+                       next-level-cache = <&l2_0>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        capacity-dmips-mhz = <1024>;
                        dynamic-power-coefficient = <100>;
                                        <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        #cooling-cells = <2>;
-                       L2_0: l2-cache {
+                       l2_0: l2-cache {
                                compatible = "cache";
                                cache-level = <2>;
                                cache-unified;
-                               next-level-cache = <&L3_0>;
-                               L3_0: l3-cache {
+                               next-level-cache = <&l3_0>;
+                               l3_0: l3-cache {
                                        compatible = "cache";
                                        cache-level = <3>;
                                        cache-unified;
                        };
                };
 
-               CPU1: cpu@100 {
+               cpu1: cpu@100 {
                        device_type = "cpu";
                        compatible = "qcom,kryo";
                        reg = <0x0 0x100>;
                        clocks = <&cpufreq_hw 0>;
                        enable-method = "psci";
-                       power-domains = <&CPU_PD1>;
+                       power-domains = <&cpu_pd1>;
                        power-domain-names = "psci";
-                       next-level-cache = <&L2_100>;
+                       next-level-cache = <&l2_100>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        capacity-dmips-mhz = <1024>;
                        dynamic-power-coefficient = <100>;
                                        <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        #cooling-cells = <2>;
-                       L2_100: l2-cache {
+                       l2_100: l2-cache {
                                compatible = "cache";
                                cache-level = <2>;
                                cache-unified;
-                               next-level-cache = <&L3_0>;
+                               next-level-cache = <&l3_0>;
                        };
                };
 
-               CPU2: cpu@200 {
+               cpu2: cpu@200 {
                        device_type = "cpu";
                        compatible = "qcom,kryo";
                        reg = <0x0 0x200>;
                        clocks = <&cpufreq_hw 0>;
                        enable-method = "psci";
-                       power-domains = <&CPU_PD2>;
+                       power-domains = <&cpu_pd2>;
                        power-domain-names = "psci";
-                       next-level-cache = <&L2_200>;
+                       next-level-cache = <&l2_200>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        capacity-dmips-mhz = <1024>;
                        dynamic-power-coefficient = <100>;
                                        <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        #cooling-cells = <2>;
-                       L2_200: l2-cache {
+                       l2_200: l2-cache {
                                compatible = "cache";
                                cache-level = <2>;
                                cache-unified;
-                               next-level-cache = <&L3_0>;
+                               next-level-cache = <&l3_0>;
                        };
                };
 
-               CPU3: cpu@300 {
+               cpu3: cpu@300 {
                        device_type = "cpu";
                        compatible = "qcom,kryo";
                        reg = <0x0 0x300>;
                        clocks = <&cpufreq_hw 0>;
                        enable-method = "psci";
-                       power-domains = <&CPU_PD3>;
+                       power-domains = <&cpu_pd3>;
                        power-domain-names = "psci";
-                       next-level-cache = <&L2_300>;
+                       next-level-cache = <&l2_300>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        capacity-dmips-mhz = <1024>;
                        dynamic-power-coefficient = <100>;
                                        <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        #cooling-cells = <2>;
-                       L2_300: l2-cache {
+                       l2_300: l2-cache {
                                compatible = "cache";
                                cache-level = <2>;
                                cache-unified;
-                               next-level-cache = <&L3_0>;
+                               next-level-cache = <&l3_0>;
                        };
                };
 
-               CPU4: cpu@400 {
+               cpu4: cpu@400 {
                        device_type = "cpu";
                        compatible = "qcom,kryo";
                        reg = <0x0 0x400>;
                        clocks = <&cpufreq_hw 1>;
                        enable-method = "psci";
-                       power-domains = <&CPU_PD4>;
+                       power-domains = <&cpu_pd4>;
                        power-domain-names = "psci";
-                       next-level-cache = <&L2_400>;
+                       next-level-cache = <&l2_400>;
                        operating-points-v2 = <&cpu4_opp_table>;
                        capacity-dmips-mhz = <1946>;
                        dynamic-power-coefficient = <520>;
                                        <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        #cooling-cells = <2>;
-                       L2_400: l2-cache {
+                       l2_400: l2-cache {
                                compatible = "cache";
                                cache-level = <2>;
                                cache-unified;
-                               next-level-cache = <&L3_0>;
+                               next-level-cache = <&l3_0>;
                        };
                };
 
-               CPU5: cpu@500 {
+               cpu5: cpu@500 {
                        device_type = "cpu";
                        compatible = "qcom,kryo";
                        reg = <0x0 0x500>;
                        clocks = <&cpufreq_hw 1>;
                        enable-method = "psci";
-                       power-domains = <&CPU_PD5>;
+                       power-domains = <&cpu_pd5>;
                        power-domain-names = "psci";
-                       next-level-cache = <&L2_500>;
+                       next-level-cache = <&l2_500>;
                        operating-points-v2 = <&cpu4_opp_table>;
                        capacity-dmips-mhz = <1946>;
                        dynamic-power-coefficient = <520>;
                                        <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        #cooling-cells = <2>;
-                       L2_500: l2-cache {
+                       l2_500: l2-cache {
                                compatible = "cache";
                                cache-level = <2>;
                                cache-unified;
-                               next-level-cache = <&L3_0>;
+                               next-level-cache = <&l3_0>;
                        };
                };
 
-               CPU6: cpu@600 {
+               cpu6: cpu@600 {
                        device_type = "cpu";
                        compatible = "qcom,kryo";
                        reg = <0x0 0x600>;
                        clocks = <&cpufreq_hw 1>;
                        enable-method = "psci";
-                       power-domains = <&CPU_PD6>;
+                       power-domains = <&cpu_pd6>;
                        power-domain-names = "psci";
-                       next-level-cache = <&L2_600>;
+                       next-level-cache = <&l2_600>;
                        operating-points-v2 = <&cpu4_opp_table>;
                        capacity-dmips-mhz = <1946>;
                        dynamic-power-coefficient = <520>;
                                        <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        #cooling-cells = <2>;
-                       L2_600: l2-cache {
+                       l2_600: l2-cache {
                                compatible = "cache";
                                cache-level = <2>;
                                cache-unified;
-                               next-level-cache = <&L3_0>;
+                               next-level-cache = <&l3_0>;
                        };
                };
 
-               CPU7: cpu@700 {
+               cpu7: cpu@700 {
                        device_type = "cpu";
                        compatible = "qcom,kryo";
                        reg = <0x0 0x700>;
                        clocks = <&cpufreq_hw 2>;
                        enable-method = "psci";
-                       power-domains = <&CPU_PD7>;
+                       power-domains = <&cpu_pd7>;
                        power-domain-names = "psci";
-                       next-level-cache = <&L2_700>;
+                       next-level-cache = <&l2_700>;
                        operating-points-v2 = <&cpu7_opp_table>;
                        capacity-dmips-mhz = <1985>;
                        dynamic-power-coefficient = <552>;
                                        <&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
                        qcom,freq-domain = <&cpufreq_hw 2>;
                        #cooling-cells = <2>;
-                       L2_700: l2-cache {
+                       l2_700: l2-cache {
                                compatible = "cache";
                                cache-level = <2>;
                                cache-unified;
-                               next-level-cache = <&L3_0>;
+                               next-level-cache = <&l3_0>;
                        };
                };
 
                cpu-map {
                        cluster0 {
                                core0 {
-                                       cpu = <&CPU0>;
+                                       cpu = <&cpu0>;
                                };
 
                                core1 {
-                                       cpu = <&CPU1>;
+                                       cpu = <&cpu1>;
                                };
 
                                core2 {
-                                       cpu = <&CPU2>;
+                                       cpu = <&cpu2>;
                                };
 
                                core3 {
-                                       cpu = <&CPU3>;
+                                       cpu = <&cpu3>;
                                };
 
                                core4 {
-                                       cpu = <&CPU4>;
+                                       cpu = <&cpu4>;
                                };
 
                                core5 {
-                                       cpu = <&CPU5>;
+                                       cpu = <&cpu5>;
                                };
 
                                core6 {
-                                       cpu = <&CPU6>;
+                                       cpu = <&cpu6>;
                                };
 
                                core7 {
-                                       cpu = <&CPU7>;
+                                       cpu = <&cpu7>;
                                };
                        };
                };
                idle-states {
                        entry-method = "psci";
 
-                       LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
+                       little_cpu_sleep_0: cpu-sleep-0-0 {
                                compatible = "arm,idle-state";
                                idle-state-name = "little-power-down";
                                arm,psci-suspend-param = <0x40000003>;
                                local-timer-stop;
                        };
 
-                       LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
+                       little_cpu_sleep_1: cpu-sleep-0-1 {
                                compatible = "arm,idle-state";
                                idle-state-name = "little-rail-power-down";
                                arm,psci-suspend-param = <0x40000004>;
                                local-timer-stop;
                        };
 
-                       BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
+                       big_cpu_sleep_0: cpu-sleep-1-0 {
                                compatible = "arm,idle-state";
                                idle-state-name = "big-power-down";
                                arm,psci-suspend-param = <0x40000003>;
                                local-timer-stop;
                        };
 
-                       BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
+                       big_cpu_sleep_1: cpu-sleep-1-1 {
                                compatible = "arm,idle-state";
                                idle-state-name = "big-rail-power-down";
                                arm,psci-suspend-param = <0x40000004>;
                };
 
                domain_idle_states: domain-idle-states {
-                       CLUSTER_SLEEP_APSS_OFF: cluster-sleep-0 {
+                       cluster_sleep_apss_off: cluster-sleep-0 {
                                compatible = "domain-idle-state";
                                arm,psci-suspend-param = <0x41000044>;
                                entry-latency-us = <2752>;
                                min-residency-us = <6118>;
                        };
 
-                       CLUSTER_SLEEP_CX_RET: cluster-sleep-1 {
+                       cluster_sleep_cx_ret: cluster-sleep-1 {
                                compatible = "domain-idle-state";
                                arm,psci-suspend-param = <0x41001344>;
                                entry-latency-us = <3263>;
                                min-residency-us = <8467>;
                        };
 
-                       CLUSTER_SLEEP_LLCC_OFF: cluster-sleep-2 {
+                       cluster_sleep_llcc_off: cluster-sleep-2 {
                                compatible = "domain-idle-state";
                                arm,psci-suspend-param = <0x4100b344>;
                                entry-latency-us = <3638>;
                compatible = "arm,psci-1.0";
                method = "smc";
 
-               CPU_PD0: power-domain-cpu0 {
+               cpu_pd0: power-domain-cpu0 {
                        #power-domain-cells = <0>;
-                       power-domains = <&CLUSTER_PD>;
-                       domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
+                       power-domains = <&cluster_pd>;
+                       domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
                };
 
-               CPU_PD1: power-domain-cpu1 {
+               cpu_pd1: power-domain-cpu1 {
                        #power-domain-cells = <0>;
-                       power-domains = <&CLUSTER_PD>;
-                       domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
+                       power-domains = <&cluster_pd>;
+                       domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
                };
 
-               CPU_PD2: power-domain-cpu2 {
+               cpu_pd2: power-domain-cpu2 {
                        #power-domain-cells = <0>;
-                       power-domains = <&CLUSTER_PD>;
-                       domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
+                       power-domains = <&cluster_pd>;
+                       domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
                };
 
-               CPU_PD3: power-domain-cpu3 {
+               cpu_pd3: power-domain-cpu3 {
                        #power-domain-cells = <0>;
-                       power-domains = <&CLUSTER_PD>;
-                       domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
+                       power-domains = <&cluster_pd>;
+                       domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
                };
 
-               CPU_PD4: power-domain-cpu4 {
+               cpu_pd4: power-domain-cpu4 {
                        #power-domain-cells = <0>;
-                       power-domains = <&CLUSTER_PD>;
-                       domain-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;
+                       power-domains = <&cluster_pd>;
+                       domain-idle-states = <&big_cpu_sleep_0 &big_cpu_sleep_1>;
                };
 
-               CPU_PD5: power-domain-cpu5 {
+               cpu_pd5: power-domain-cpu5 {
                        #power-domain-cells = <0>;
-                       power-domains = <&CLUSTER_PD>;
-                       domain-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;
+                       power-domains = <&cluster_pd>;
+                       domain-idle-states = <&big_cpu_sleep_0 &big_cpu_sleep_1>;
                };
 
-               CPU_PD6: power-domain-cpu6 {
+               cpu_pd6: power-domain-cpu6 {
                        #power-domain-cells = <0>;
-                       power-domains = <&CLUSTER_PD>;
-                       domain-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;
+                       power-domains = <&cluster_pd>;
+                       domain-idle-states = <&big_cpu_sleep_0 &big_cpu_sleep_1>;
                };
 
-               CPU_PD7: power-domain-cpu7 {
+               cpu_pd7: power-domain-cpu7 {
                        #power-domain-cells = <0>;
-                       power-domains = <&CLUSTER_PD>;
-                       domain-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;
+                       power-domains = <&cluster_pd>;
+                       domain-idle-states = <&big_cpu_sleep_0 &big_cpu_sleep_1>;
                };
 
-               CLUSTER_PD: power-domain-cluster {
+               cluster_pd: power-domain-cluster {
                        #power-domain-cells = <0>;
-                       domain-idle-states = <&CLUSTER_SLEEP_APSS_OFF &CLUSTER_SLEEP_CX_RET &CLUSTER_SLEEP_LLCC_OFF>;
+                       domain-idle-states = <&cluster_sleep_apss_off &cluster_sleep_cx_ret &cluster_sleep_llcc_off>;
                };
        };
 
                        compatible = "arm,coresight-etm4x", "arm,primecell";
                        reg = <0 0x07040000 0 0x1000>;
 
-                       cpu = <&CPU0>;
+                       cpu = <&cpu0>;
 
                        clocks = <&aoss_qmp>;
                        clock-names = "apb_pclk";
                        compatible = "arm,coresight-etm4x", "arm,primecell";
                        reg = <0 0x07140000 0 0x1000>;
 
-                       cpu = <&CPU1>;
+                       cpu = <&cpu1>;
 
                        clocks = <&aoss_qmp>;
                        clock-names = "apb_pclk";
                        compatible = "arm,coresight-etm4x", "arm,primecell";
                        reg = <0 0x07240000 0 0x1000>;
 
-                       cpu = <&CPU2>;
+                       cpu = <&cpu2>;
 
                        clocks = <&aoss_qmp>;
                        clock-names = "apb_pclk";
                        compatible = "arm,coresight-etm4x", "arm,primecell";
                        reg = <0 0x07340000 0 0x1000>;
 
-                       cpu = <&CPU3>;
+                       cpu = <&cpu3>;
 
                        clocks = <&aoss_qmp>;
                        clock-names = "apb_pclk";
                        compatible = "arm,coresight-etm4x", "arm,primecell";
                        reg = <0 0x07440000 0 0x1000>;
 
-                       cpu = <&CPU4>;
+                       cpu = <&cpu4>;
 
                        clocks = <&aoss_qmp>;
                        clock-names = "apb_pclk";
                        compatible = "arm,coresight-etm4x", "arm,primecell";
                        reg = <0 0x07540000 0 0x1000>;
 
-                       cpu = <&CPU5>;
+                       cpu = <&cpu5>;
 
                        clocks = <&aoss_qmp>;
                        clock-names = "apb_pclk";
                        compatible = "arm,coresight-etm4x", "arm,primecell";
                        reg = <0 0x07640000 0 0x1000>;
 
-                       cpu = <&CPU6>;
+                       cpu = <&cpu6>;
 
                        clocks = <&aoss_qmp>;
                        clock-names = "apb_pclk";
                        compatible = "arm,coresight-etm4x", "arm,primecell";
                        reg = <0 0x07740000 0 0x1000>;
 
-                       cpu = <&CPU7>;
+                       cpu = <&cpu7>;
 
                        clocks = <&aoss_qmp>;
                        clock-names = "apb_pclk";
                                          <SLEEP_TCS   3>,
                                          <WAKE_TCS    3>,
                                          <CONTROL_TCS 1>;
-                       power-domains = <&CLUSTER_PD>;
+                       power-domains = <&cluster_pd>;
 
                        apps_bcm_voter: bcm-voter {
                                compatible = "qcom,bcm-voter";
                        cooling-maps {
                                map0 {
                                        trip = <&cpu0_alert0>;
-                                       cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                                map1 {
                                        trip = <&cpu0_alert1>;
-                                       cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                        };
                };
                        cooling-maps {
                                map0 {
                                        trip = <&cpu1_alert0>;
-                                       cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                                map1 {
                                        trip = <&cpu1_alert1>;
-                                       cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                        };
                };
                        cooling-maps {
                                map0 {
                                        trip = <&cpu2_alert0>;
-                                       cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                                map1 {
                                        trip = <&cpu2_alert1>;
-                                       cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                        };
                };
                        cooling-maps {
                                map0 {
                                        trip = <&cpu3_alert0>;
-                                       cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                                map1 {
                                        trip = <&cpu3_alert1>;
-                                       cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                        };
                };
                        cooling-maps {
                                map0 {
                                        trip = <&cpu4_alert0>;
-                                       cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                                map1 {
                                        trip = <&cpu4_alert1>;
-                                       cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                        };
                };
                        cooling-maps {
                                map0 {
                                        trip = <&cpu5_alert0>;
-                                       cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                                map1 {
                                        trip = <&cpu5_alert1>;
-                                       cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                        };
                };
                        cooling-maps {
                                map0 {
                                        trip = <&cpu6_alert0>;
-                                       cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                                map1 {
                                        trip = <&cpu6_alert1>;
-                                       cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                        };
                };
                        cooling-maps {
                                map0 {
                                        trip = <&cpu7_alert0>;
-                                       cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                                map1 {
                                        trip = <&cpu7_alert1>;
-                                       cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                        };
                };
                        cooling-maps {
                                map0 {
                                        trip = <&cpu8_alert0>;
-                                       cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                                map1 {
                                        trip = <&cpu8_alert1>;
-                                       cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                        };
                };
                        cooling-maps {
                                map0 {
                                        trip = <&cpu9_alert0>;
-                                       cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                                map1 {
                                        trip = <&cpu9_alert1>;
-                                       cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                        };
                };
                        cooling-maps {
                                map0 {
                                        trip = <&cpu10_alert0>;
-                                       cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                                map1 {
                                        trip = <&cpu10_alert1>;
-                                       cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                        };
                };
                        cooling-maps {
                                map0 {
                                        trip = <&cpu11_alert0>;
-                                       cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                                map1 {
                                        trip = <&cpu11_alert1>;
-                                       cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                                        <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                       cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                        };
                };
index e80e0d3b77329836ec3c97e707c5659b9ad83325..717ec4ad63f3035b839d85fb1dd375fac9b0a2b7 100644 (file)
                #address-cells = <2>;
                #size-cells = <0>;
 
-               CPU0: cpu@0 {
+               cpu0: cpu@0 {
                        device_type = "cpu";
                        compatible = "qcom,kryo485";
                        reg = <0x0 0x0>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <602>;
-                       next-level-cache = <&L2_0>;
+                       next-level-cache = <&l2_0>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        interconnects = <&gem_noc MASTER_AMPSS_M0 3 &mc_virt SLAVE_EBI_CH0 3>,
                                        <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
-                       power-domains = <&CPU_PD0>;
+                       power-domains = <&cpu_pd0>;
                        power-domain-names = "psci";
                        #cooling-cells = <2>;
                        clocks = <&cpufreq_hw 0>;
 
-                       L2_0: l2-cache {
+                       l2_0: l2-cache {
                                compatible = "cache";
                                cache-level = <2>;
                                cache-unified;
-                               next-level-cache = <&L3_0>;
-                               L3_0: l3-cache {
+                               next-level-cache = <&l3_0>;
+                               l3_0: l3-cache {
                                        compatible = "cache";
                                        cache-level = <3>;
                                        cache-unified;
                        };
                };
 
-               CPU1: cpu@100 {
+               cpu1: cpu@100 {
                        device_type = "cpu";
                        compatible = "qcom,kryo485";
                        reg = <0x0 0x100>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <602>;
-                       next-level-cache = <&L2_100>;
+                       next-level-cache = <&l2_100>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        interconnects = <&gem_noc MASTER_AMPSS_M0 3 &mc_virt SLAVE_EBI_CH0 3>,
                                        <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
-                       power-domains = <&CPU_PD1>;
+                       power-domains = <&cpu_pd1>;
                        power-domain-names = "psci";
                        #cooling-cells = <2>;
                        clocks = <&cpufreq_hw 0>;
 
-                       L2_100: l2-cache {
+                       l2_100: l2-cache {
                                compatible = "cache";
                                cache-level = <2>;
                                cache-unified;
-                               next-level-cache = <&L3_0>;
+                               next-level-cache = <&l3_0>;
                        };
 
                };
 
-               CPU2: cpu@200 {
+               cpu2: cpu@200 {
                        device_type = "cpu";
                        compatible = "qcom,kryo485";
                        reg = <0x0 0x200>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <602>;
-                       next-level-cache = <&L2_200>;
+                       next-level-cache = <&l2_200>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        interconnects = <&gem_noc MASTER_AMPSS_M0 3 &mc_virt SLAVE_EBI_CH0 3>,
                                        <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
-                       power-domains = <&CPU_PD2>;
+                       power-domains = <&cpu_pd2>;
                        power-domain-names = "psci";
                        #cooling-cells = <2>;
                        clocks = <&cpufreq_hw 0>;
 
-                       L2_200: l2-cache {
+                       l2_200: l2-cache {
                                compatible = "cache";
                                cache-level = <2>;
                                cache-unified;
-                               next-level-cache = <&L3_0>;
+                               next-level-cache = <&l3_0>;
                        };
                };
 
-               CPU3: cpu@300 {
+               cpu3: cpu@300 {
                        device_type = "cpu";
                        compatible = "qcom,kryo485";
                        reg = <0x0 0x300>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <602>;
-                       next-level-cache = <&L2_300>;
+                       next-level-cache = <&l2_300>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        interconnects = <&gem_noc MASTER_AMPSS_M0 3 &mc_virt SLAVE_EBI_CH0 3>,
                                        <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
-                       power-domains = <&CPU_PD3>;
+                       power-domains = <&cpu_pd3>;
                        power-domain-names = "psci";
                        #cooling-cells = <2>;
                        clocks = <&cpufreq_hw 0>;
 
-                       L2_300: l2-cache {
+                       l2_300: l2-cache {
                                compatible = "cache";
                                cache-unified;
                                cache-level = <2>;
-                               next-level-cache = <&L3_0>;
+                               next-level-cache = <&l3_0>;
                        };
                };
 
-               CPU4: cpu@400 {
+               cpu4: cpu@400 {
                        device_type = "cpu";
                        compatible = "qcom,kryo485";
                        reg = <0x0 0x400>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <1024>;
-                       next-level-cache = <&L2_400>;
+                       next-level-cache = <&l2_400>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        operating-points-v2 = <&cpu4_opp_table>;
                        interconnects = <&gem_noc MASTER_AMPSS_M0 3 &mc_virt SLAVE_EBI_CH0 3>,
                                        <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
-                       power-domains = <&CPU_PD4>;
+                       power-domains = <&cpu_pd4>;
                        power-domain-names = "psci";
                        #cooling-cells = <2>;
                        clocks = <&cpufreq_hw 1>;
 
-                       L2_400: l2-cache {
+                       l2_400: l2-cache {
                                compatible = "cache";
                                cache-unified;
                                cache-level = <2>;
-                               next-level-cache = <&L3_0>;
+                               next-level-cache = <&l3_0>;
                        };
                };
 
-               CPU5: cpu@500 {
+               cpu5: cpu@500 {
                        device_type = "cpu";
                        compatible = "qcom,kryo485";
                        reg = <0x0 0x500>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <1024>;
-                       next-level-cache = <&L2_500>;
+                       next-level-cache = <&l2_500>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        operating-points-v2 = <&cpu4_opp_table>;
                        interconnects = <&gem_noc MASTER_AMPSS_M0 3 &mc_virt SLAVE_EBI_CH0 3>,
                                        <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
-                       power-domains = <&CPU_PD5>;
+                       power-domains = <&cpu_pd5>;
                        power-domain-names = "psci";
                        #cooling-cells = <2>;
                        clocks = <&cpufreq_hw 1>;
 
-                       L2_500: l2-cache {
+                       l2_500: l2-cache {
                                compatible = "cache";
                                cache-unified;
                                cache-level = <2>;
-                               next-level-cache = <&L3_0>;
+                               next-level-cache = <&l3_0>;
                        };
                };
 
-               CPU6: cpu@600 {
+               cpu6: cpu@600 {
                        device_type = "cpu";
                        compatible = "qcom,kryo485";
                        reg = <0x0 0x600>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <1024>;
-                       next-level-cache = <&L2_600>;
+                       next-level-cache = <&l2_600>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        operating-points-v2 = <&cpu4_opp_table>;
                        interconnects = <&gem_noc MASTER_AMPSS_M0 3 &mc_virt SLAVE_EBI_CH0 3>,
                                        <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
-                       power-domains = <&CPU_PD6>;
+                       power-domains = <&cpu_pd6>;
                        power-domain-names = "psci";
                        #cooling-cells = <2>;
                        clocks = <&cpufreq_hw 1>;
 
-                       L2_600: l2-cache {
+                       l2_600: l2-cache {
                                compatible = "cache";
                                cache-unified;
                                cache-level = <2>;
-                               next-level-cache = <&L3_0>;
+                               next-level-cache = <&l3_0>;
                        };
                };
 
-               CPU7: cpu@700 {
+               cpu7: cpu@700 {
                        device_type = "cpu";
                        compatible = "qcom,kryo485";
                        reg = <0x0 0x700>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <1024>;
-                       next-level-cache = <&L2_700>;
+                       next-level-cache = <&l2_700>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        operating-points-v2 = <&cpu4_opp_table>;
                        interconnects = <&gem_noc MASTER_AMPSS_M0 3 &mc_virt SLAVE_EBI_CH0 3>,
                                        <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
-                       power-domains = <&CPU_PD7>;
+                       power-domains = <&cpu_pd7>;
                        power-domain-names = "psci";
                        #cooling-cells = <2>;
                        clocks = <&cpufreq_hw 1>;
 
-                       L2_700: l2-cache {
+                       l2_700: l2-cache {
                                compatible = "cache";
                                cache-unified;
                                cache-level = <2>;
-                               next-level-cache = <&L3_0>;
+                               next-level-cache = <&l3_0>;
                        };
                };
 
                cpu-map {
                        cluster0 {
                                core0 {
-                                       cpu = <&CPU0>;
+                                       cpu = <&cpu0>;
                                };
 
                                core1 {
-                                       cpu = <&CPU1>;
+                                       cpu = <&cpu1>;
                                };
 
                                core2 {
-                                       cpu = <&CPU2>;
+                                       cpu = <&cpu2>;
                                };
 
                                core3 {
-                                       cpu = <&CPU3>;
+                                       cpu = <&cpu3>;
                                };
 
                                core4 {
-                                       cpu = <&CPU4>;
+                                       cpu = <&cpu4>;
                                };
 
                                core5 {
-                                       cpu = <&CPU5>;
+                                       cpu = <&cpu5>;
                                };
 
                                core6 {
-                                       cpu = <&CPU6>;
+                                       cpu = <&cpu6>;
                                };
 
                                core7 {
-                                       cpu = <&CPU7>;
+                                       cpu = <&cpu7>;
                                };
                        };
                };
                idle-states {
                        entry-method = "psci";
 
-                       LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
+                       little_cpu_sleep_0: cpu-sleep-0-0 {
                                compatible = "arm,idle-state";
                                arm,psci-suspend-param = <0x40000004>;
                                entry-latency-us = <355>;
                                local-timer-stop;
                        };
 
-                       BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
+                       big_cpu_sleep_0: cpu-sleep-1-0 {
                                compatible = "arm,idle-state";
                                arm,psci-suspend-param = <0x40000004>;
                                entry-latency-us = <2411>;
                };
 
                domain-idle-states {
-                       CLUSTER_SLEEP_APSS_OFF: cluster-sleep-0 {
+                       cluster_sleep_apss_off: cluster-sleep-0 {
                                compatible = "domain-idle-state";
                                arm,psci-suspend-param = <0x41000044>;
                                entry-latency-us = <3300>;
                                min-residency-us = <6000>;
                        };
 
-                       CLUSTER_SLEEP_AOSS_SLEEP: cluster-sleep-1 {
+                       cluster_sleep_aoss_sleep: cluster-sleep-1 {
                                compatible = "domain-idle-state";
                                arm,psci-suspend-param = <0x4100a344>;
                                entry-latency-us = <3263>;
                compatible = "arm,psci-1.0";
                method = "smc";
 
-               CPU_PD0: power-domain-cpu0 {
+               cpu_pd0: power-domain-cpu0 {
                        #power-domain-cells = <0>;
-                       power-domains = <&CLUSTER_PD>;
-                       domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+                       power-domains = <&cluster_pd>;
+                       domain-idle-states = <&little_cpu_sleep_0>;
                };
 
-               CPU_PD1: power-domain-cpu1 {
+               cpu_pd1: power-domain-cpu1 {
                        #power-domain-cells = <0>;
-                       power-domains = <&CLUSTER_PD>;
-                       domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+                       power-domains = <&cluster_pd>;
+                       domain-idle-states = <&little_cpu_sleep_0>;
                };
 
-               CPU_PD2: power-domain-cpu2 {
+               cpu_pd2: power-domain-cpu2 {
                        #power-domain-cells = <0>;
-                       power-domains = <&CLUSTER_PD>;
-                       domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+                       power-domains = <&cluster_pd>;
+                       domain-idle-states = <&little_cpu_sleep_0>;
                };
 
-               CPU_PD3: power-domain-cpu3 {
+               cpu_pd3: power-domain-cpu3 {
                        #power-domain-cells = <0>;
-                       power-domains = <&CLUSTER_PD>;
-                       domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+                       power-domains = <&cluster_pd>;
+                       domain-idle-states = <&little_cpu_sleep_0>;
                };
 
-               CPU_PD4: power-domain-cpu4 {
+               cpu_pd4: power-domain-cpu4 {
                        #power-domain-cells = <0>;
-                       power-domains = <&CLUSTER_PD>;
-                       domain-idle-states = <&BIG_CPU_SLEEP_0>;
+                       power-domains = <&cluster_pd>;
+                       domain-idle-states = <&big_cpu_sleep_0>;
                };
 
-               CPU_PD5: power-domain-cpu5 {
+               cpu_pd5: power-domain-cpu5 {
                        #power-domain-cells = <0>;
-                       power-domains = <&CLUSTER_PD>;
-                       domain-idle-states = <&BIG_CPU_SLEEP_0>;
+                       power-domains = <&cluster_pd>;
+                       domain-idle-states = <&big_cpu_sleep_0>;
                };
 
-               CPU_PD6: power-domain-cpu6 {
+               cpu_pd6: power-domain-cpu6 {
                        #power-domain-cells = <0>;
-                       power-domains = <&CLUSTER_PD>;
-                       domain-idle-states = <&BIG_CPU_SLEEP_0>;
+                       power-domains = <&cluster_pd>;
+                       domain-idle-states = <&big_cpu_sleep_0>;
                };
 
-               CPU_PD7: power-domain-cpu7 {
+               cpu_pd7: power-domain-cpu7 {
                        #power-domain-cells = <0>;
-                       power-domains = <&CLUSTER_PD>;
-                       domain-idle-states = <&BIG_CPU_SLEEP_0>;
+                       power-domains = <&cluster_pd>;
+                       domain-idle-states = <&big_cpu_sleep_0>;
                };
 
-               CLUSTER_PD: power-domain-cpu-cluster0 {
+               cluster_pd: power-domain-cpu-cluster0 {
                        #power-domain-cells = <0>;
-                       domain-idle-states = <&CLUSTER_SLEEP_APSS_OFF &CLUSTER_SLEEP_AOSS_SLEEP>;
+                       domain-idle-states = <&cluster_sleep_apss_off &cluster_sleep_aoss_sleep>;
                };
        };
 
                                          <WAKE_TCS    1>,
                                          <CONTROL_TCS 0>;
                        label = "apps_rsc";
-                       power-domains = <&CLUSTER_PD>;
+                       power-domains = <&cluster_pd>;
 
                        apps_bcm_voter: bcm-voter {
                                compatible = "qcom,bcm-voter";
                        compatible = "qcom,sc8180x-lmh";
                        reg = <0 0x18350800 0 0x400>;
                        interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
-                       cpus = <&CPU4>;
+                       cpus = <&cpu4>;
                        qcom,lmh-temp-arm-millicelsius = <65000>;
                        qcom,lmh-temp-low-millicelsius = <94500>;
                        qcom,lmh-temp-high-millicelsius = <95000>;
                        compatible = "qcom,sc8180x-lmh";
                        reg = <0 0x18358800 0 0x400>;
                        interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-                       cpus = <&CPU0>;
+                       cpus = <&cpu0>;
                        qcom,lmh-temp-arm-millicelsius = <65000>;
                        qcom,lmh-temp-low-millicelsius = <94500>;
                        qcom,lmh-temp-high-millicelsius = <95000>;
index 5b4574484412cfc75060f382f3527a8fe6519cc9..85d34b53e5e9d1d7dcbf1192f7aa51250a61e76e 100644 (file)
@@ -7,11 +7,11 @@
 #include "sc7280.dtsi"
 
 /* SM7325 uses Kryo 670 */
-&CPU0 { compatible = "qcom,kryo670"; };
-&CPU1 { compatible = "qcom,kryo670"; };
-&CPU2 { compatible = "qcom,kryo670"; };
-&CPU3 { compatible = "qcom,kryo670"; };
-&CPU4 { compatible = "qcom,kryo670"; };
-&CPU5 { compatible = "qcom,kryo670"; };
-&CPU6 { compatible = "qcom,kryo670"; };
-&CPU7 { compatible = "qcom,kryo670"; };
+&cpu0 { compatible = "qcom,kryo670"; };
+&cpu1 { compatible = "qcom,kryo670"; };
+&cpu2 { compatible = "qcom,kryo670"; };
+&cpu3 { compatible = "qcom,kryo670"; };
+&cpu4 { compatible = "qcom,kryo670"; };
+&cpu5 { compatible = "qcom,kryo670"; };
+&cpu6 { compatible = "qcom,kryo670"; };
+&cpu7 { compatible = "qcom,kryo670"; };