]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
drm/rcar-du: dsi: Fix PHY lock bit check
authorTomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
Tue, 17 Dec 2024 05:31:35 +0000 (07:31 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 7 Mar 2025 15:56:37 +0000 (16:56 +0100)
[ Upstream commit 6389e616fae8a101ce00068f7690461ab57b29d8 ]

The driver checks for bit 16 (using CLOCKSET1_LOCK define) in CLOCKSET1
register when waiting for the PPI clock. However, the right bit to check
is bit 17 (CLOCKSET1_LOCK_PHY define). Not only that, but there's
nothing in the documents for bit 16 for V3U nor V4H.

So, fix the check to use bit 17, and drop the define for bit 16.

Fixes: 155358310f01 ("drm: rcar-du: Add R-Car DSI driver")
Fixes: 11696c5e8924 ("drm: Place Renesas drivers in a separate dir")
Cc: stable@vger.kernel.org
Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241217-rcar-gh-dsi-v5-1-e77421093c05@ideasonboard.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/rcar-du/rcar_mipi_dsi.c
drivers/gpu/drm/rcar-du/rcar_mipi_dsi_regs.h

index a7f2b7f66a176a6525ec4ddf53cc6ba57af75756..9ec9c43971dfb37f3aff6cf3063d5cb3dfb8a53d 100644 (file)
@@ -396,7 +396,7 @@ static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi *dsi,
        for (timeout = 10; timeout > 0; --timeout) {
                if ((rcar_mipi_dsi_read(dsi, PPICLSR) & PPICLSR_STPST) &&
                    (rcar_mipi_dsi_read(dsi, PPIDLSR) & PPIDLSR_STPST) &&
-                   (rcar_mipi_dsi_read(dsi, CLOCKSET1) & CLOCKSET1_LOCK))
+                   (rcar_mipi_dsi_read(dsi, CLOCKSET1) & CLOCKSET1_LOCK_PHY))
                        break;
 
                usleep_range(1000, 2000);
index 2eaca54636f3d4d2a336710857dee50c8b700f79..1f1eb46c721fe608043695e2440190739aa3ebc5 100644 (file)
 
 #define CLOCKSET1                      0x101c
 #define CLOCKSET1_LOCK_PHY             (1 << 17)
-#define CLOCKSET1_LOCK                 (1 << 16)
 #define CLOCKSET1_CLKSEL               (1 << 8)
 #define CLOCKSET1_CLKINSEL_EXTAL       (0 << 2)
 #define CLOCKSET1_CLKINSEL_DIG         (1 << 2)