riscv: dts: thead: set dma-noncoherent to soc bus

[ Upstream commit 759426c758c7053a941a4c06c7571461439fcff6 ]

riscv select ARCH_DMA_DEFAULT_COHERENT by default, and th1520 isn't
dma coherent, so set dma-noncoherent to reflect this fact.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Tested-by: Drew Fustini <dfustini@baylibre.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index 56a73134b49e67cba255f486c0767958e098bcf7..58108f0eb3fdceee849a284e8521f0bce3ad813a 100644 (file)
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -139,6 +139,7 @@
                interrupt-parent = <&plic>;
                #address-cells = <2>;
                #size-cells = <2>;
+               dma-noncoherent;
                ranges;
 
                plic: interrupt-controller@ffd8000000 {