]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/radeon: add missing revision check for CI
authorAlex Deucher <alexander.deucher@amd.com>
Mon, 27 Apr 2026 15:40:25 +0000 (11:40 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 5 May 2026 14:15:49 +0000 (10:15 -0400)
The memory level workarounds only apply to revision 0 SKUs.

Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/1816
Fixes: 127e056e2a82 ("drm/radeon: fix mclk vddc configuration for cards for hawaii")
Fixes: 21b8a369046f ("drm/radeon: fix dram timing for certain hawaii boards")
Fixes: 90b2fee35cb9 ("drm/radeon: fix dpm mc init for certain hawaii boards")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 4d8dcc14311515077062b5740f39f427075de5c9)
Cc: stable@vger.kernel.org
drivers/gpu/drm/radeon/ci_dpm.c

index 22321eb95b7d5de747e47bd6fc2e18c29cde6d88..703848fac18933eca8cbdc174dc54df4a0750d6c 100644 (file)
@@ -2461,7 +2461,8 @@ static void ci_register_patching_mc_arb(struct radeon_device *rdev,
 
        if (patch &&
            ((rdev->pdev->device == 0x67B0) ||
-            (rdev->pdev->device == 0x67B1))) {
+            (rdev->pdev->device == 0x67B1)) &&
+           (rdev->pdev->revision == 0)) {
                if ((memory_clock > 100000) && (memory_clock <= 125000)) {
                        tmp2 = (((0x31 * engine_clock) / 125000) - 1) & 0xff;
                        *dram_timimg2 &= ~0x00ff0000;
@@ -3304,7 +3305,8 @@ static int ci_populate_all_memory_levels(struct radeon_device *rdev)
        pi->smc_state_table.MemoryLevel[0].EnabledForActivity = 1;
 
        if ((dpm_table->mclk_table.count >= 2) &&
-           ((rdev->pdev->device == 0x67B0) || (rdev->pdev->device == 0x67B1))) {
+           ((rdev->pdev->device == 0x67B0) || (rdev->pdev->device == 0x67B1)) &&
+           (rdev->pdev->revision == 0)) {
                pi->smc_state_table.MemoryLevel[1].MinVddc =
                        pi->smc_state_table.MemoryLevel[0].MinVddc;
                pi->smc_state_table.MemoryLevel[1].MinVddcPhases =
@@ -4493,7 +4495,8 @@ static int ci_register_patching_mc_seq(struct radeon_device *rdev,
 
        if (patch &&
            ((rdev->pdev->device == 0x67B0) ||
-            (rdev->pdev->device == 0x67B1))) {
+            (rdev->pdev->device == 0x67B1)) &&
+           (rdev->pdev->revision == 0)) {
                for (i = 0; i < table->last; i++) {
                        if (table->last >= SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE)
                                return -EINVAL;