ARM: dts: turris-omnia: Fix mpp26 pin name and comment

[ Upstream commit 49e93898f0dc177e645c22d0664813567fd9ec00 ]

There is a bug in Turris Omnia's schematics, whereupon the MPP[26] pin,
which is routed to CN11 pin header, is documented as SPI CS1, but
MPP[26] pin does not support this function. Instead it controls chip
select 2 if in "spi0" mode.

Fix the name of the pin node in pinctrl node and fix the comment in SPI
node.

Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm/boot/dts/armada-385-turris-omnia.dts b/arch/arm/boot/dts/armada-385-turris-omnia.dts
index f4878df39753edb8a6ecab59fbbc82d42f08a0e2..487dece2033cdd8620b02c77c585ac4c8836e637 100644 (file)
--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
@@ -478,7 +478,7 @@
                marvell,function = "spi0";
        };
 
-       spi0cs1_pins: spi0cs1-pins {
+       spi0cs2_pins: spi0cs2-pins {
                marvell,pins = "mpp26";
                marvell,function = "spi0";
        };
@@ -513,7 +513,7 @@
                };
        };
 
-       /* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
+       /* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */
 };
 
 &uart0 {