drm/amdgpu: dont pin wptr bo instead use eviction fence

Instead of pinning the wptr bo attach the eviction fence to
the bo to make sure it remains valid all the time.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 7264bc10c7c657a54603c7fc058bf8e15f18ce12)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
index 572f2949cb64eaad1d4cde711327dd112c36a951..3efe1ae273861eba8f28a24e4ac969126f4a7f37 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
@@ -965,6 +965,7 @@ amdgpu_userq_vm_validate(struct amdgpu_userq_mgr *uq_mgr)
        struct amdgpu_vm *vm = &fpriv->vm;
        unsigned long key, tmp_key;
        struct amdgpu_bo_va *bo_va;
+       struct amdgpu_usermode_queue *queue;
        struct amdgpu_bo *bo;
        struct drm_exec exec;
        struct xarray xa;
@@ -1080,6 +1081,24 @@ retry_lock:
                dma_fence_wait(bo_va->last_pt_update, false);
        dma_fence_wait(vm->last_update, false);
 
+       xa_for_each(&uq_mgr->userq_xa, tmp_key, queue) {
+               bo = queue->wptr_obj.obj;
+               if (!bo) {
+                       ret = -EINVAL;
+                       goto unlock_all;
+               }
+
+               ret = amdgpu_ttm_alloc_gart(&bo->tbo);
+               if (unlikely(ret)) {
+                       drm_file_err(uq_mgr->file,
+                                    "failed to bind wptr bo to gart on resume, qid=%lu ret=%d\n",
+                                    tmp_key, ret);
+                       goto unlock_all;
+               }
+
+               queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset(bo);
+       }
+
        ret = amdgpu_evf_mgr_rearm(&fpriv->evf_mgr, &exec);
        if (ret)
                drm_file_err(uq_mgr->file, "Failed to replace eviction fence\n");

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
index 16625c31bfd32f5c332188c14ca9b93b184ef17f..4e44a581a78a2144e1f7134bea1814414d26b35e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
@@ -70,27 +70,23 @@ mes_userq_create_wptr_mapping(struct amdgpu_device *adev,
                ret = -EINVAL;
                goto fail_map;
        }
-
-       /* TODO use eviction fence instead of pinning. */
-       ret = amdgpu_bo_pin(wptr_obj->obj, AMDGPU_GEM_DOMAIN_GTT);
+       /* Keep WPTR BO under eviction-fence control instead of pinning. */
+       ret = amdgpu_evf_mgr_attach_fence(&uq_mgr_to_fpriv(uq_mgr)->evf_mgr, wptr_obj->obj);
        if (ret) {
-               DRM_ERROR("Failed to pin wptr bo. ret %d\n", ret);
+               DRM_ERROR("Failed to attach eviction fence to wptr bo. ret %d\n", ret);
                goto fail_map;
        }
 
        ret = amdgpu_ttm_alloc_gart(&wptr_obj->obj->tbo);
        if (ret) {
-               DRM_ERROR("Failed to bind bo to GART. ret %d\n", ret);
-               goto fail_alloc_gart;
+               DRM_ERROR("Failed to bind wptr bo to GART. ret %d\n", ret);
+               goto fail_map;
        }
 
        queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset(wptr_obj->obj);
 
        drm_exec_fini(&exec);
        return 0;
-
-fail_alloc_gart:
-       amdgpu_bo_unpin(wptr_obj->obj);
 fail_map:
        amdgpu_bo_unref(&wptr_obj->obj);
 fail_lock:
@@ -468,9 +464,6 @@ static void mes_userq_mqd_destroy(struct amdgpu_usermode_queue *queue)
        amdgpu_bo_free_kernel(&queue->mqd.obj, &queue->mqd.gpu_addr,
                              &queue->mqd.cpu_ptr);
 
-       amdgpu_bo_reserve(queue->wptr_obj.obj, true);
-       amdgpu_bo_unpin(queue->wptr_obj.obj);
-       amdgpu_bo_unreserve(queue->wptr_obj.obj);
        amdgpu_bo_unref(&queue->wptr_obj.obj);
 }