]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
ASoC: SOF: Intel: add support for Nova Lake NVL
authorPeter Ujfalusi <peter.ujfalusi@linux.intel.com>
Tue, 20 Jan 2026 19:35:05 +0000 (21:35 +0200)
committerMark Brown <broonie@kernel.org>
Tue, 20 Jan 2026 20:08:21 +0000 (20:08 +0000)
Add support for Nova Lake (NVL).
The core count for NVL is different compared to NVL-S (4 vs 2)

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Reviewed-by: Liam Girdwood <liam.r.girdwood@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Takashi Iwai <tiwai@suse.de>
Link: https://patch.msgid.link/20260120193507.14019-3-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/sof/intel/hda.h
sound/soc/sof/intel/nvl.c
sound/soc/sof/intel/pci-nvl.c

index 562fe8be79c1e363253add1bd0de02a23e844779..3be39c229c9f84be00a102bd9133d8f89103e503 100644 (file)
@@ -936,6 +936,7 @@ extern const struct sof_intel_dsp_desc arl_s_chip_info;
 extern const struct sof_intel_dsp_desc lnl_chip_info;
 extern const struct sof_intel_dsp_desc ptl_chip_info;
 extern const struct sof_intel_dsp_desc wcl_chip_info;
+extern const struct sof_intel_dsp_desc nvl_chip_info;
 extern const struct sof_intel_dsp_desc nvl_s_chip_info;
 
 /* Probes support */
index ff215151af2a41e9e23de1cf8aedc06ac4ec101a..0d763998558f0c80bcd117c8c663e95d3dd3c871 100644 (file)
@@ -26,6 +26,30 @@ int sof_nvl_set_ops(struct snd_sof_dev *sdev, struct snd_sof_dsp_ops *dsp_ops)
 };
 EXPORT_SYMBOL_NS(sof_nvl_set_ops, "SND_SOC_SOF_INTEL_NVL");
 
+const struct sof_intel_dsp_desc nvl_chip_info = {
+       .cores_num = 4,
+       .init_core_mask = BIT(0),
+       .host_managed_cores_mask = BIT(0),
+       .ipc_req = MTL_DSP_REG_HFIPCXIDR,
+       .ipc_req_mask = MTL_DSP_REG_HFIPCXIDR_BUSY,
+       .ipc_ack = MTL_DSP_REG_HFIPCXIDA,
+       .ipc_ack_mask = MTL_DSP_REG_HFIPCXIDA_DONE,
+       .ipc_ctl = MTL_DSP_REG_HFIPCXCTL,
+       .rom_status_reg = LNL_DSP_REG_HFDSC,
+       .rom_init_timeout = 300,
+       .ssp_count = MTL_SSP_COUNT,
+       .d0i3_offset = MTL_HDA_VS_D0I3C,
+       .read_sdw_lcount =  hda_sdw_check_lcount_ext,
+       .check_sdw_irq = lnl_dsp_check_sdw_irq,
+       .check_sdw_wakeen_irq = lnl_sdw_check_wakeen_irq,
+       .sdw_process_wakeen = hda_sdw_process_wakeen_common,
+       .check_ipc_irq = mtl_dsp_check_ipc_irq,
+       .cl_init = mtl_dsp_cl_init,
+       .power_down_dsp = mtl_power_down_dsp,
+       .disable_interrupts = lnl_dsp_disable_interrupts,
+       .hw_ip_version = SOF_INTEL_ACE_4_0,
+};
+
 const struct sof_intel_dsp_desc nvl_s_chip_info = {
        .cores_num = 2,
        .init_core_mask = BIT(0),
index f75aa996a5bdb2fd4f22c5b4a442234d2a2dbaed..bb3c29ef547773a2b598c0f7afb44bc178667212 100644 (file)
@@ -26,6 +26,36 @@ static int sof_nvl_ops_init(struct snd_sof_dev *sdev)
        return sof_nvl_set_ops(sdev, &sof_nvl_ops);
 }
 
+static const struct sof_dev_desc nvl_desc = {
+       .use_acpi_target_states = true,
+       .machines               = snd_soc_acpi_intel_nvl_machines,
+       .alt_machines           = snd_soc_acpi_intel_nvl_sdw_machines,
+       .resindex_lpe_base      = 0,
+       .resindex_pcicfg_base   = -1,
+       .resindex_imr_base      = -1,
+       .irqindex_host_ipc      = -1,
+       .chip_info              = &nvl_chip_info,
+       .ipc_supported_mask     = BIT(SOF_IPC_TYPE_4),
+       .ipc_default            = SOF_IPC_TYPE_4,
+       .dspless_mode_supported = true,
+       .on_demand_dsp_boot     = true,
+       .default_fw_path = {
+               [SOF_IPC_TYPE_4] = "intel/sof-ipc4/nvl",
+       },
+       .default_lib_path = {
+               [SOF_IPC_TYPE_4] = "intel/sof-ipc4-lib/nvl",
+       },
+       .default_tplg_path = {
+               [SOF_IPC_TYPE_4] = "intel/sof-ipc4-tplg",
+       },
+       .default_fw_filename = {
+               [SOF_IPC_TYPE_4] = "sof-nvl.ri",
+       },
+       .nocodec_tplg_filename = "sof-nvl-nocodec.tplg",
+       .ops = &sof_nvl_ops,
+       .ops_init = sof_nvl_ops_init,
+};
+
 static const struct sof_dev_desc nvl_s_desc = {
        .use_acpi_target_states = true,
        .machines               = snd_soc_acpi_intel_nvl_machines,
@@ -58,6 +88,7 @@ static const struct sof_dev_desc nvl_s_desc = {
 
 /* PCI IDs */
 static const struct pci_device_id sof_pci_ids[] = {
+       { PCI_DEVICE_DATA(INTEL, HDA_NVL, &nvl_desc) }, /* NVL */
        { PCI_DEVICE_DATA(INTEL, HDA_NVL_S, &nvl_s_desc) }, /* NVL-S */
        { 0, }
 };