backport: [multiple changes]

2014-04-09  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline r208750
	2014-03-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_expand_vector_set):  Generate a
	pattern for vector nor instead of subtract from splat(-1).
	(altivec_expand_vec_perm_const_le): Likewise.

	Backport from mainline r209235
	2014-04-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_expand_vector_set): Use vnand
	instead of vnor to exploit possible fusion opportunity in the
	future.
	(altivec_expand_vec_perm_const_le): Likewise.

From-SVN: r209255

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5f8c63824706b84ee63c751cc122ad2b2a1e1ce0..ab35ff055c206fd9797311e2fe77aa73c16a90d3 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,20 @@
+2014-04-09  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+       Backport from mainline r208750
+       2014-03-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+       * config/rs6000/rs6000.c (rs6000_expand_vector_set):  Generate a
+       pattern for vector nor instead of subtract from splat(-1).
+       (altivec_expand_vec_perm_const_le): Likewise.
+
+       Backport from mainline r209235
+       2014-04-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+       * config/rs6000/rs6000.c (rs6000_expand_vector_set): Use vnand
+       instead of vnor to exploit possible fusion opportunity in the
+       future.
+       (altivec_expand_vec_perm_const_le): Likewise.
+
 2014-04-09  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 
        Revert following patch

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 4d7de4009cf25e8bc6a591b3d29ecf79423a299b..96772618d1c8d358778fa56816d20dc27d7fbb1a 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -5620,13 +5620,15 @@ rs6000_expand_vector_set (rtx target, rtx val, int elt)
                        UNSPEC_VPERM);
   else 
     {
-      /* Invert selector.  */
-      rtx splat = gen_rtx_VEC_DUPLICATE (V16QImode,
-                                        gen_rtx_CONST_INT (QImode, -1));
+      /* Invert selector.  We prefer to generate VNAND on P8 so
+        that future fusion opportunities can kick in, but must
+        generate VNOR elsewhere.  */
+      rtx notx = gen_rtx_NOT (V16QImode, force_reg (V16QImode, x));
+      rtx iorx = (TARGET_P8_VECTOR
+                 ? gen_rtx_IOR (V16QImode, notx, notx)
+                 : gen_rtx_AND (V16QImode, notx, notx));
       rtx tmp = gen_reg_rtx (V16QImode);
-      emit_move_insn (tmp, splat);
-      x = gen_rtx_MINUS (V16QImode, tmp, force_reg (V16QImode, x));
-      emit_move_insn (tmp, x);
+      emit_insn (gen_rtx_SET (VOIDmode, tmp, iorx));
 
       /* Permute with operands reversed and adjusted selector.  */
       x = gen_rtx_UNSPEC (mode, gen_rtvec (3, reg, target, tmp),
@@ -30335,18 +30337,18 @@ altivec_expand_vec_perm_const_le (rtx operands[4])
 
 /* Similarly to altivec_expand_vec_perm_const_le, we must adjust the
    permute control vector.  But here it's not a constant, so we must
-   generate a vector splat/subtract to do the adjustment.  */
+   generate a vector NAND or NOR to do the adjustment.  */
 
 void
 altivec_expand_vec_perm_le (rtx operands[4])
 {
-  rtx splat, unspec;
+  rtx notx, iorx, unspec;
   rtx target = operands[0];
   rtx op0 = operands[1];
   rtx op1 = operands[2];
   rtx sel = operands[3];
   rtx tmp = target;
-  rtx splatreg = gen_reg_rtx (V16QImode);
+  rtx norreg = gen_reg_rtx (V16QImode);
   enum machine_mode mode = GET_MODE (target);
 
   /* Get everything in regs so the pattern matches.  */
@@ -30359,18 +30361,17 @@ altivec_expand_vec_perm_le (rtx operands[4])
   if (!REG_P (target))
     tmp = gen_reg_rtx (mode);
 
-  /* SEL = splat(31) - SEL.  */
-  /* We want to subtract from 31, but we can't vspltisb 31 since
-     it's out of range.  -1 works as well because only the low-order
-     five bits of the permute control vector elements are used.  */
-  splat = gen_rtx_VEC_DUPLICATE (V16QImode,
-                                gen_rtx_CONST_INT (QImode, -1));
-  emit_move_insn (splatreg, splat);
-  sel = gen_rtx_MINUS (V16QImode, splatreg, sel);
-  emit_move_insn (splatreg, sel);
+  /* Invert the selector with a VNAND if available, else a VNOR.
+     The VNAND is preferred for future fusion opportunities.  */
+  notx = gen_rtx_NOT (V16QImode, sel);
+  iorx = (TARGET_P8_VECTOR
+         ? gen_rtx_IOR (V16QImode, notx, notx)
+         : gen_rtx_AND (V16QImode, notx, notx));
+  emit_insn (gen_rtx_SET (VOIDmode, norreg, iorx));
 
   /* Permute with operands reversed and adjusted selector.  */
-  unspec = gen_rtx_UNSPEC (mode, gen_rtvec (3, op1, op0, splatreg), UNSPEC_VPERM);
+  unspec = gen_rtx_UNSPEC (mode, gen_rtvec (3, op1, op0, norreg),
+                          UNSPEC_VPERM);
 
   /* Copy into target, possibly by way of a register.  */
   if (!REG_P (target))