target/m68k: Inline translator_ld[uw,l,q]() calls

In preparation of removing the translator_ld[uw,l,q]() methods,
inline them for the m68k target, expanding MO_TE -> MO_BE since
this architecture is only available in big endianness.

Mechanical change using the following Coccinelle 'spatch' script:

    @@
    expression env, db, pc, do_swap;
    @@
    (
    - translator_lduw(env, db, pc)
    + translator_lduw_end(env, db, pc, MO_BE)
    |
    - translator_ldl(env, db, pc)
    + translator_ldl_end(env, db, pc, MO_BE)
    |
    - translator_ldq(env, db, pc)
    + translator_ldq_end(env, db, pc, MO_BE)
    )

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-ID: <20260202214050.98935-1-philmd@linaro.org>

diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 721668634d971169a586eca4ae983e117b3aac20..a0309939012b11ef47367da0bfc583c8f5305e7d 100644 (file)
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -347,7 +347,7 @@ static TCGv gen_ldst(DisasContext *s, int opsize, TCGv addr, TCGv val,
 static inline uint16_t read_im16(CPUM68KState *env, DisasContext *s)
 {
     uint16_t im;
-    im = translator_lduw(env, &s->base, s->pc);
+    im = translator_lduw_end(env, &s->base, s->pc, MO_BE);
     s->pc += 2;
     return im;
 }
@@ -1412,12 +1412,12 @@ static bool semihosting_test(DisasContext *s)
     if (s->pc % 4 != 0) {
         return false;
     }
-    test = translator_lduw(s->env, &s->base, s->pc - 4);
+    test = translator_lduw_end(s->env, &s->base, s->pc - 4, MO_BE);
     if (test != 0x4e71) {
         return false;
     }
     /* "... and followed by an invalid sentinel instruction movec %sp,0." */
-    test = translator_ldl(s->env, &s->base, s->pc);
+    test = translator_ldl_end(s->env, &s->base, s->pc, MO_BE);
     if (test != 0x4e7bf000) {
         return false;
     }