]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
spi: microchip-core: use XOR instead of ANDNOT to fix the logic
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Thu, 8 Jan 2026 17:49:40 +0000 (18:49 +0100)
committerMark Brown <broonie@kernel.org>
Thu, 8 Jan 2026 20:06:30 +0000 (20:06 +0000)
Use XOR instead of ANDNOT to fix the logic. The current approach with
(foo & BAR & ~baz) is harder to process, and it proved to be wrong,
than more usual pattern for the comparing misconfiguration using
((foo ^ baz) & BAR) which can be read as "find all different bits
between foo and baz that are related to BAR (mask)". Besides that
it makes the binary code shorter.

Function                                     old     new   delta
mchp_corespi_setup                           103      99      -4

Fixes: 059f545832be ("spi: add support for microchip "soft" spi controller")
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Tested-by: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://patch.msgid.link/20260108175100.3535306-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-microchip-core-spi.c

index 89e40fc45d73aa8abbd708c7e1ef24d08860f0d9..c8ebb58e0369af7f2d03b57e02ec43e6e343a61e 100644 (file)
@@ -161,7 +161,7 @@ static int mchp_corespi_setup(struct spi_device *spi)
                return -EOPNOTSUPP;
        }
 
-       if (spi->mode & SPI_MODE_X_MASK & ~spi->controller->mode_bits) {
+       if ((spi->mode ^ spi->controller->mode_bits) & SPI_MODE_X_MASK) {
                dev_err(&spi->dev, "incompatible CPOL/CPHA, must match controller's Motorola mode\n");
                return -EINVAL;
        }