arm64: dts: renesas: r9a09g047e57-smarc: Enable RSPI0

Enable RSPI0 on the RZ/G3E SMARC EVK, where it is accessible on the
PMOD0 connector.

Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/b634c10e632fed07b5652c11de060deca27ead90.1771344527.git.tommaso.merciai.xr@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
index 696903dc7a636e49a3f91fec9a85bb93db6916cc..30ffd458f188b944f68f3a75a0c6f6946d651f56 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
@@ -167,6 +167,13 @@
                bias-pull-up;
        };
 
+       rspi0_pins: rspi0 {
+               pinmux = <RZG3E_PORT_PINMUX(M, 4, 2)>, /* MISOA */
+                        <RZG3E_PORT_PINMUX(M, 5, 2)>, /* MOSIA */
+                        <RZG3E_PORT_PINMUX(M, 6, 2)>, /* RSPCKA */
+                        <RZG3E_PORT_PINMUX(M, 7, 2)>; /* SSLA0 */
+       };
+
        scif_pins: scif {
                pins = "SCIF_TXD", "SCIF_RXD";
                renesas,output-impedance = <1>;
@@ -234,6 +241,15 @@
 };
 #endif
 
+&rspi0 {
+       pinctrl-0 = <&rspi0_pins>;
+       pinctrl-names = "default";
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       status = "okay";
+};
+
 &scif0 {
        pinctrl-0 = <&scif_pins>;
        pinctrl-names = "default";