iio: adc: mt6359: Add support for MediaTek MT6373 PMIC AUXADC

MediaTek MT6373 is a PMIC found on MT8196/MT6991 board designs
and communicates with the SoC over SPMI.

This PMIC integrates an Auxiliary ADC (AUXADC) which has a grand
total of 54 channels, of which usually only 9 are used as this
is usually paired with MT6363 on the same board.

For the Auxiliary ADC part, this reuses the same register layout
as the MT6363 PMIC, but exposes only a subset of the ADC chans.

Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Link: https://patch.msgid.link/20250703141146.171431-7-angelogioacchino.delregno@collabora.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

diff --git a/drivers/iio/adc/mt6359-auxadc.c b/drivers/iio/adc/mt6359-auxadc.c
index 272c86343a9179995a516769ad31d7238063ca5b..f426a289e8678722b458ec450b4107275a43725b 100644 (file)
--- a/drivers/iio/adc/mt6359-auxadc.c
+++ b/drivers/iio/adc/mt6359-auxadc.c
@@ -50,6 +50,7 @@
 #define MT6363_EXT_CHAN_MASK           GENMASK(2, 0)
 #define MT6363_EXT_PURES_MASK          GENMASK(4, 3)
   #define MT6363_PULLUP_RES_100K       0
+  #define MT6363_PULLUP_RES_30K                1
   #define MT6363_PULLUP_RES_OPEN       3
 
 enum mtk_pmic_auxadc_regs {
@@ -412,6 +413,43 @@ static const u16 mt6363_auxadc_regs[] = {
        [PMIC_AUXADC_IMP1]      = 0x1209,
 };
 
+static const struct iio_chan_spec mt6373_auxadc_channels[] = {
+       MTK_PMIC_IIO_CHAN(MT6363, chip_temp, CHIP_TEMP, 4, 12, IIO_TEMP),
+       MTK_PMIC_IIO_CHAN(MT6363, vcore_temp, VCORE_TEMP, 38, 12, IIO_TEMP),
+       MTK_PMIC_IIO_CHAN(MT6363, vproc_temp, VPROC_TEMP, 39, 12, IIO_TEMP),
+       MTK_PMIC_IIO_CHAN(MT6363, vgpu_temp, VGPU_TEMP, 40, 12, IIO_TEMP),
+
+       /* For VIN, ADC12 holds the result depending on which GPIO was activated */
+       MTK_PMIC_IIO_CHAN(MT6363, in1_v, VIN1, 45, 15, IIO_VOLTAGE),
+       MTK_PMIC_IIO_CHAN(MT6363, in2_v, VIN2, 45, 15, IIO_VOLTAGE),
+       MTK_PMIC_IIO_CHAN(MT6363, in3_v, VIN3, 45, 15, IIO_VOLTAGE),
+       MTK_PMIC_IIO_CHAN(MT6363, in4_v, VIN4, 45, 15, IIO_VOLTAGE),
+       MTK_PMIC_IIO_CHAN(MT6363, in5_v, VIN5, 45, 15, IIO_VOLTAGE),
+};
+
+static const struct mtk_pmic_auxadc_chan mt6373_auxadc_ch_desc[] = {
+       MTK_PMIC_ADC_CHAN(CHIP_TEMP, PMIC_AUXADC_RQST0, 4, PMIC_AUXADC_ADC0, 15, 32, 1, 1),
+       MTK_PMIC_ADC_CHAN(VCORE_TEMP, PMIC_AUXADC_RQST3, 0, PMIC_AUXADC_ADC0, 15, 32, 1, 1),
+       MTK_PMIC_ADC_CHAN(VPROC_TEMP, PMIC_AUXADC_RQST3, 1, PMIC_AUXADC_ADC0, 15, 32, 1, 1),
+       MTK_PMIC_ADC_CHAN(VGPU_TEMP, PMIC_AUXADC_RQST3, 2, PMIC_AUXADC_ADC0, 15, 32, 1, 1),
+
+       MTK_PMIC_ADC_EXT_CHAN(VIN1,
+                             PMIC_AUXADC_RQST1, 4, PMIC_AUXADC_ADC0, 15,
+                             PMIC_AUXADC_SDMADC_CON0, 1, MT6363_PULLUP_RES_30K, 32, 1, 1),
+       MTK_PMIC_ADC_EXT_CHAN(VIN2,
+                             PMIC_AUXADC_RQST1, 4, PMIC_AUXADC_ADC0, 15,
+                             PMIC_AUXADC_SDMADC_CON0, 2, MT6363_PULLUP_RES_OPEN, 32, 1, 1),
+       MTK_PMIC_ADC_EXT_CHAN(VIN3,
+                             PMIC_AUXADC_RQST1, 4, PMIC_AUXADC_ADC0, 15,
+                             PMIC_AUXADC_SDMADC_CON0, 3, MT6363_PULLUP_RES_OPEN, 32, 1, 1),
+       MTK_PMIC_ADC_EXT_CHAN(VIN4,
+                             PMIC_AUXADC_RQST1, 4, PMIC_AUXADC_ADC0, 15,
+                             PMIC_AUXADC_SDMADC_CON0, 4, MT6363_PULLUP_RES_OPEN, 32, 1, 1),
+       MTK_PMIC_ADC_EXT_CHAN(VIN5,
+                             PMIC_AUXADC_RQST1, 4, PMIC_AUXADC_ADC0, 15,
+                             PMIC_AUXADC_SDMADC_CON0, 5, MT6363_PULLUP_RES_OPEN, 32, 1, 1),
+};
+
 static void mt6358_stop_imp_conv(struct mt6359_auxadc *adc_dev)
 {
        const struct mtk_pmic_auxadc_info *cinfo = adc_dev->chip_info;
@@ -554,6 +592,17 @@ static const struct mtk_pmic_auxadc_info mt6363_chip_info = {
        .vref_mV = 1840,
 };
 
+static const struct mtk_pmic_auxadc_info mt6373_chip_info = {
+       .model_name = "MT6373",
+       .channels = mt6373_auxadc_channels,
+       .num_channels = ARRAY_SIZE(mt6373_auxadc_channels),
+       .desc = mt6373_auxadc_ch_desc,
+       .regs = mt6363_auxadc_regs,
+       .is_spmi = true,
+       .no_reset = true,
+       .vref_mV = 1840,
+};
+
 static void mt6359_auxadc_reset(struct mt6359_auxadc *adc_dev)
 {
        const struct mtk_pmic_auxadc_info *cinfo = adc_dev->chip_info;
@@ -840,6 +889,7 @@ static const struct of_device_id mt6359_auxadc_of_match[] = {
        { .compatible = "mediatek,mt6358-auxadc", .data = &mt6358_chip_info },
        { .compatible = "mediatek,mt6359-auxadc", .data = &mt6359_chip_info },
        { .compatible = "mediatek,mt6363-auxadc", .data = &mt6363_chip_info },
+       { .compatible = "mediatek,mt6373-auxadc", .data = &mt6373_chip_info },
        { }
 };
 MODULE_DEVICE_TABLE(of, mt6359_auxadc_of_match);