int idx = pci_resource_num(dev, res);
const char *res_name = pci_resource_name(dev, idx);
- if (WARN_ON_ONCE(res->parent))
+ if (WARN_ON_ONCE(resource_assigned(res)))
return;
res->start = dev_res->start;
if ((r->flags & type_mask) != type)
continue;
- if (!r->parent)
+ if (!resource_assigned(r))
return r;
if (!r_assigned)
r_assigned = r;
struct resource *pbus_select_window(struct pci_bus *bus,
const struct resource *res)
{
- if (res->parent)
+ if (resource_assigned(res))
return res->parent;
return pbus_select_window_for_type(bus, res->flags);
static bool pdev_resource_should_fit(struct pci_dev *dev, struct resource *res)
{
- if (res->parent)
+ if (resource_assigned(res))
return false;
if (res->flags & IORESOURCE_PCI_FIXED)
* Skip resource that failed the earlier assignment and is
* not optional as it would just fail again.
*/
- if (!res->parent && resource_size(res) &&
+ if (!resource_assigned(res) && resource_size(res) &&
!pci_resource_is_optional(dev, idx))
goto out;
res_name = pci_resource_name(dev, idx);
add_size = add_res->add_size;
align = add_res->min_align;
- if (!res->parent) {
+ if (!resource_assigned(res)) {
resource_set_range(res, align,
resource_size(res) + add_size);
if (pci_assign_resource(dev, idx)) {
list_for_each_entry(save_res, &save_head, list) {
struct resource *res = save_res->res;
- if (res->parent)
+ if (resource_assigned(res))
continue;
restore_dev_resource(save_res);
list_for_each_entry_safe(dev_res, tmp_res, head, list) {
res = dev_res->res;
- if (res->parent && !pci_need_to_release(fail_type, res)) {
+ if (resource_assigned(res) &&
+ !pci_need_to_release(fail_type, res)) {
/* Remove it from realloc_head list */
remove_from_list(realloc_head, res);
remove_from_list(&save_head, res);
res = dev_res->res;
dev = dev_res->dev;
- if (res->parent)
+ if (resource_assigned(res))
continue;
if (fail_head) {
res = bus->resource[0];
pcibios_resource_to_bus(bridge->bus, ®ion, res);
- if (res->parent && res->flags & IORESOURCE_IO) {
+ if (resource_assigned(res) && res->flags & IORESOURCE_IO) {
/*
* The IO resource is allocated a range twice as large as it
* would normally need. This allows us to set both IO regs.
res = bus->resource[1];
pcibios_resource_to_bus(bridge->bus, ®ion, res);
- if (res->parent && res->flags & IORESOURCE_IO) {
+ if (resource_assigned(res) && res->flags & IORESOURCE_IO) {
pci_info(bridge, " bridge window %pR\n", res);
pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
region.start);
res = bus->resource[2];
pcibios_resource_to_bus(bridge->bus, ®ion, res);
- if (res->parent && res->flags & IORESOURCE_MEM) {
+ if (resource_assigned(res) && res->flags & IORESOURCE_MEM) {
pci_info(bridge, " bridge window %pR\n", res);
pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
region.start);
res = bus->resource[3];
pcibios_resource_to_bus(bridge->bus, ®ion, res);
- if (res->parent && res->flags & IORESOURCE_MEM) {
+ if (resource_assigned(res) && res->flags & IORESOURCE_MEM) {
pci_info(bridge, " bridge window %pR\n", res);
pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
region.start);
res = &bridge->resource[PCI_BRIDGE_IO_WINDOW];
res_name = pci_resource_name(bridge, PCI_BRIDGE_IO_WINDOW);
pcibios_resource_to_bus(bridge->bus, ®ion, res);
- if (res->parent && res->flags & IORESOURCE_IO) {
+ if (resource_assigned(res) && res->flags & IORESOURCE_IO) {
pci_read_config_word(bridge, PCI_IO_BASE, &l);
io_base_lo = (region.start >> 8) & io_mask;
io_limit_lo = (region.end >> 8) & io_mask;
res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW];
res_name = pci_resource_name(bridge, PCI_BRIDGE_MEM_WINDOW);
pcibios_resource_to_bus(bridge->bus, ®ion, res);
- if (res->parent && res->flags & IORESOURCE_MEM) {
+ if (resource_assigned(res) && res->flags & IORESOURCE_MEM) {
l = (region.start >> 16) & 0xfff0;
l |= region.end & 0xfff00000;
pci_info(bridge, " %s %pR\n", res_name, res);
res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW];
res_name = pci_resource_name(bridge, PCI_BRIDGE_PREF_MEM_WINDOW);
pcibios_resource_to_bus(bridge->bus, ®ion, res);
- if (res->parent && res->flags & IORESOURCE_PREFETCH) {
+ if (resource_assigned(res) && res->flags & IORESOURCE_PREFETCH) {
l = (region.start >> 16) & 0xfff0;
l |= region.end & 0xfff00000;
if (res->flags & IORESOURCE_MEM_64) {
return;
/* If resource is already assigned, nothing more to do */
- if (b_res->parent)
+ if (resource_assigned(b_res))
return;
min_align = window_alignment(bus, IORESOURCE_IO);
pci_dev_for_each_resource(dev, r) {
unsigned long r_size;
- if (r->parent || !(r->flags & IORESOURCE_IO))
+ if (resource_assigned(r) || !(r->flags & IORESOURCE_IO))
continue;
if (!pdev_resource_assignable(dev, r))
return;
/* If resource is already assigned, nothing more to do */
- if (b_res->parent)
+ if (resource_assigned(b_res))
return;
max_order = 0;
u16 ctrl;
b_res = &bridge->resource[PCI_CB_BRIDGE_IO_0_WINDOW];
- if (b_res->parent)
+ if (resource_assigned(b_res))
goto handle_b_res_1;
/*
* Reserve some resources for CardBus. We reserve a fixed amount
handle_b_res_1:
b_res = &bridge->resource[PCI_CB_BRIDGE_IO_1_WINDOW];
- if (b_res->parent)
+ if (resource_assigned(b_res))
goto handle_b_res_2;
resource_set_range(b_res, pci_cardbus_io_size, pci_cardbus_io_size);
b_res->flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;
}
b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_0_WINDOW];
- if (b_res->parent)
+ if (resource_assigned(b_res))
goto handle_b_res_3;
/*
* If we have prefetchable memory support, allocate two regions.
handle_b_res_3:
b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_1_WINDOW];
- if (b_res->parent)
+ if (resource_assigned(b_res))
goto handle_done;
resource_set_range(b_res, pci_cardbus_mem_size, b_res_3_size);
b_res->flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN;
pci_dev_for_each_resource(dev, r) {
struct pci_bus *b;
- if (r->parent || !(r->flags & IORESOURCE_PCI_FIXED) ||
+ if (resource_assigned(r) ||
+ !(r->flags & IORESOURCE_PCI_FIXED) ||
!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
continue;
b = dev->bus;
- while (b && !r->parent) {
+ while (b && !resource_assigned(r)) {
assign_fixed_resource_on_bus(b, r);
b = b->parent;
}
for (i = 0; i < PCI_BRIDGE_RESOURCES; i++) {
struct resource *r = &dev->resource[i];
- if (!r->flags || r->parent)
+ if (!r->flags || resource_assigned(r))
continue;
pci_claim_resource(dev, i);
for (i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++) {
struct resource *r = &dev->resource[i];
- if (!r->flags || r->parent)
+ if (!r->flags || resource_assigned(r))
continue;
pci_claim_bridge_resource(dev, i);
struct pci_dev *dev = bus->self;
int idx, ret;
- if (!b_win->parent)
+ if (!resource_assigned(b_win))
return;
idx = pci_resource_num(dev, b_win);
{
resource_size_t add_size, size = resource_size(res);
- if (res->parent)
+ if (resource_assigned(res))
return;
if (!new_size)
* window.
*/
align = pci_resource_alignment(bridge, res);
- if (!res->parent && align)
+ if (!resource_assigned(res) && align)
available[i].start = min(ALIGN(available[i].start, align),
available[i].end + 1);
i = pci_resource_num(dev, res);
- if (res->parent) {
+ if (resource_assigned(res)) {
release_child_resources(res);
pci_release_resource(dev, i);
}