]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
* c-c++-common/patchable_function_entry-decl.c: Pass -mcpu=gr6 for
authorebotcazou <ebotcazou@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 10 Dec 2018 11:16:47 +0000 (11:16 +0000)
committerebotcazou <ebotcazou@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 10 Dec 2018 11:16:47 +0000 (11:16 +0000)
Visium and remove other specific handling.
* c-c++-common/patchable_function_entry-default.c: Likewise.
* c-c++-common/patchable_function_entry-definition.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@266948 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/ChangeLog
gcc/testsuite/c-c++-common/patchable_function_entry-decl.c
gcc/testsuite/c-c++-common/patchable_function_entry-default.c
gcc/testsuite/c-c++-common/patchable_function_entry-definition.c

index 7b90d56c769ae843864f526abef1b8dd53d2c69f..2306622ad72531212ada31de4d300a002ab6d65f 100644 (file)
@@ -1,3 +1,10 @@
+2018-12-10  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * c-c++-common/patchable_function_entry-decl.c: Pass -mcpu=gr6 for
+       Visium and remove other specific handling.
+       * c-c++-common/patchable_function_entry-default.c: Likewise.
+       * c-c++-common/patchable_function_entry-definition.c: Likewise.
+
 2018-12-09  Steven G. Kargl  <kargl@gcc.gnu.org>
 
        PR fortran/88205
index 3bfb7568bee850815e82563a4641d7bd5683a4f8..572297ca1f405d033f3f94ba7e606311872aafba 100644 (file)
@@ -1,8 +1,8 @@
 /* { dg-do compile { target { ! nvptx*-*-* } } } */
 /* { dg-options "-O2 -fpatchable-function-entry=3,1" } */
-/* { dg-final { scan-assembler-times "nop|NOP" 2 { target { ! { alpha*-*-* visium-*-* } } } } } */
+/* { dg-additional-options "-mcpu=gr6" { target visium-*-* } }
+/* { dg-final { scan-assembler-times "nop|NOP" 2 { target { ! { alpha*-*-* } } } } } */
 /* { dg-final { scan-assembler-times "bis" 2 { target alpha*-*-* } } } */
-/* { dg-final { scan-assembler-times "nop" 3 { target visium-*-* } } } */
 
 extern int a;
 
index bd7c6e98fc6586d8dbcd482e0b883bbff09ca838..942ec14c8e5b83242ec4700c38029e2ec68bda25 100644 (file)
@@ -1,8 +1,8 @@
 /* { dg-do compile { target { ! nvptx*-*-* } } } */
 /* { dg-options "-O2 -fpatchable-function-entry=3,1" } */
-/* { dg-final { scan-assembler-times "nop|NOP" 3 { target { ! { alpha*-*-* visium-*-* } } } } } */
+/* { dg-additional-options "-mcpu=gr6" { target visium-*-* } }
+/* { dg-final { scan-assembler-times "nop|NOP" 3 { target { ! { alpha*-*-* } } } } } */
 /* { dg-final { scan-assembler-times "bis" 3 { target alpha*-*-* } } } */
-/* { dg-final { scan-assembler-times "nop" 4 { target visium-*-* } } } */
 
 extern int a;
 
index 709113890effc6642ad1d9931b7939b7c0bfd67f..e88b0eb15c14b9639e4f26510fa789d543ee5780 100644 (file)
@@ -1,8 +1,8 @@
 /* { dg-do compile { target { ! nvptx*-*-* } } } */
 /* { dg-options "-O2 -fpatchable-function-entry=3,1" } */
-/* { dg-final { scan-assembler-times "nop|NOP" 1 { target { ! { alpha*-*-* visium-*-* } } } } } */
+/* { dg-additional-options "-mcpu=gr6" { target visium-*-* } }
+/* { dg-final { scan-assembler-times "nop|NOP" 1 { target { ! { alpha*-*-* } } } } } */
 /* { dg-final { scan-assembler-times "bis" 1 { target alpha*-*-* } } } */
-/* { dg-final { scan-assembler-times "nop" 2 { target visium-*-* } } } */
 
 extern int a;