drm/msm/dpu: Set vsync source irrespective of mdp top support

Since DPU 5.x the vsync source TE setup is split between MDP TOP and
INTF blocks. Currently all code to setup vsync_source is only executed
if MDP TOP implements the setup_vsync_source() callback. However on
DPU >= 8.x this callback is not implemented, making DPU driver skip all
vsync setup. Move the INTF part out of this condition, letting DPU
driver to setup TE vsync selection on all new DPU devices.

Signed-off-by: Teguh Sobirin <teguh@sobir.in>
Fixes: 2f69e5458447 ("drm/msm/dpu: skip watchdog timer programming through TOP on >= SM8450")
[DB: restored top->ops.setup_vsync_source call]
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/696584/
Link: https://lore.kernel.org/r/20251230-intf-fix-wd-v6-1-98203d150611@oss.qualcomm.com

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 9f3957f24c6a3dc110a4d0b31bb65fe290be4ee4..af5122a514bd1279ee64fafe554d382d591381b0 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -785,6 +785,8 @@ static void _dpu_encoder_update_vsync_source(struct dpu_encoder_virt *dpu_enc,
                return;
        }
 
+       vsync_cfg.vsync_source = disp_info->vsync_source;
+
        if (hw_mdptop->ops.setup_vsync_source) {
                for (i = 0; i < dpu_enc->num_phys_encs; i++)
                        vsync_cfg.ppnumber[i] = dpu_enc->hw_pp[i]->idx;
@@ -792,17 +794,15 @@ static void _dpu_encoder_update_vsync_source(struct dpu_encoder_virt *dpu_enc,
                vsync_cfg.pp_count = dpu_enc->num_phys_encs;
                vsync_cfg.frame_rate = drm_mode_vrefresh(&dpu_enc->base.crtc->state->adjusted_mode);
 
-               vsync_cfg.vsync_source = disp_info->vsync_source;
-
                hw_mdptop->ops.setup_vsync_source(hw_mdptop, &vsync_cfg);
+       }
 
-               for (i = 0; i < dpu_enc->num_phys_encs; i++) {
-                       phys_enc = dpu_enc->phys_encs[i];
+       for (i = 0; i < dpu_enc->num_phys_encs; i++) {
+               phys_enc = dpu_enc->phys_encs[i];
 
-                       if (phys_enc->has_intf_te && phys_enc->hw_intf->ops.vsync_sel)
-                               phys_enc->hw_intf->ops.vsync_sel(phys_enc->hw_intf,
-                                               vsync_cfg.vsync_source);
-               }
+               if (phys_enc->has_intf_te && phys_enc->hw_intf->ops.vsync_sel)
+                       phys_enc->hw_intf->ops.vsync_sel(phys_enc->hw_intf,
+                                                        vsync_cfg.vsync_source);
        }
 }