backport: re PR target/57623 (BEXTR intrinsic has memory operands switched around...

	Backported from mainline
	2013-06-27  Jakub Jelinek  <jakub@redhat.com>

	PR target/57623
	* config/i386/i386.md (bmi_bextr_<mode>): Swap predicates and
	constraints of operand 1 and 2.

	* gcc.target/i386/bmi-bextr-3.c: New test.

From-SVN: r210168

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 90a411b8969cf08fe1c8a378ad3d1045f4f83663..ea476d5eb5502e358c5cb8cda957993c7f34b229 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -3,6 +3,10 @@
        Backported from mainline
        2013-06-27  Jakub Jelinek  <jakub@redhat.com>
 
+       PR target/57623
+       * config/i386/i386.md (bmi_bextr_<mode>): Swap predicates and
+       constraints of operand 1 and 2.
+
        PR target/57623
        * config/i386/i386.md (bmi2_bzhi_<mode>3): Swap AND arguments
        to match RTL canonicalization.  Swap predicates and

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 781e671036d498c6ce44668a8d1f77938341da29..9b8a96e428d660d5e6f959262b71ffb46906ac35 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -12077,8 +12077,8 @@
 
 (define_insn "bmi_bextr_<mode>"
   [(set (match_operand:SWI48 0 "register_operand" "=r")
-        (unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r")
-                       (match_operand:SWI48 2 "nonimmediate_operand" "rm")]
+        (unspec:SWI48 [(match_operand:SWI48 1 "nonimmediate_operand" "rm")
+                       (match_operand:SWI48 2 "register_operand" "r")]
                        UNSPEC_BEXTR))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_BMI"

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 897dfbcc086621f557094ea8c054e90eaa3f9de6..3723fc0e579f879a7b6834019b56bcd732601711 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -3,6 +3,9 @@
        Backported from mainline
        2013-06-27  Jakub Jelinek  <jakub@redhat.com>
 
+       PR target/57623
+       * gcc.target/i386/bmi-bextr-3.c: New test.
+
        PR target/57623
        * gcc.target/i386/bmi2-bzhi-1.c: New test.
 

diff --git a/gcc/testsuite/gcc.target/i386/bmi-bextr-3.c b/gcc/testsuite/gcc.target/i386/bmi-bextr-3.c
new file mode 100644 (file)
index 0000000..fe342b9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/bmi-bextr-3.c
@@ -0,0 +1,31 @@
+/* PR target/57623 */
+/* { dg-do assemble { target bmi } } */
+/* { dg-options "-O2 -mbmi" } */
+
+#include <x86intrin.h>
+
+unsigned int
+f1 (unsigned int x, unsigned int *y)
+{
+  return __bextr_u32 (x, *y);
+}
+
+unsigned int
+f2 (unsigned int *x, unsigned int y)
+{
+  return __bextr_u32 (*x, y);
+}
+
+#ifdef  __x86_64__
+unsigned long long
+f3 (unsigned long long x, unsigned long long *y)
+{
+  return __bextr_u64 (x, *y);
+}
+
+unsigned long long
+f4 (unsigned long long *x, unsigned long long y)
+{
+  return __bextr_u64 (*x, y);
+}
+#endif