s390: Support z17 processor name

The recently announced IBM z17 processor implements the architecture
already supported as arch15.  This patch adds support for z17 as an
alternative architecture name for arch15.

gcc/ChangeLog:

	* common/config/s390/s390-common.cc: Rename arch15 to z17.
	* config.gcc: Add z17.
	* config/s390/driver-native.cc: Detect z17 machine.
	* config/s390/s390-builtins.def (B_VXE3): Rename arch15 to z17.
	* config/s390/s390-c.cc (s390_resolve_overloaded_builtin): Ditto.
	* config/s390/s390-opts.h (enum processor_type): Ditto.
	* config/s390/s390.cc: Ditto.
	* config/s390/s390.h: Ditto.
	* config/s390/s390.md: Ditto.
	* config/s390/s390.opt: Add z17.
	* doc/invoke.texi: Ditto.

diff --git a/gcc/common/config/s390/s390-common.cc b/gcc/common/config/s390/s390-common.cc
index 4b0691d5a16fa8a0b97c3ff7421cb08d71a1cea6..8a147d7f80430e678a6e9762f1944e173ca5e265 100644 (file)
--- a/gcc/common/config/s390/s390-common.cc
+++ b/gcc/common/config/s390/s390-common.cc
@@ -54,10 +54,10 @@ EXPORTED_CONST int processor_flags_table[] =
                 | PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX
                 | PF_Z13 | PF_VX | PF_VXE | PF_Z14 | PF_VXE2 | PF_Z15
                 | PF_NNPA | PF_Z16,
-    /* arch15 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
+    /* z17 */    PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
                 | PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX
                 | PF_Z13 | PF_VX | PF_VXE | PF_Z14 | PF_VXE2 | PF_Z15
-                | PF_NNPA | PF_Z16 | PF_VXE3 | PF_ARCH15
+                | PF_NNPA | PF_Z16 | PF_VXE3 | PF_Z17
   };
 
 /* Change optimizations to be performed, depending on the

diff --git a/gcc/config.gcc b/gcc/config.gcc
index f7f2002a45f33fe39f8ea4a47273bc7eb4db7d41..40b50dc969ede4418b305ca01869ec157e054283 100644 (file)
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -5756,7 +5756,7 @@ case "${target}" in
                for which in arch tune; do
                        eval "val=\$with_$which"
                        case ${val} in
-                       "" | native | z900 | z990 | z9-109 | z9-ec | z10 | z196 | zEC12 | z13 | z14 | z15 | z16 | arch5 | arch6 | arch7 | arch8 | arch9 | arch10 | arch11 | arch12 | arch13 | arch14 | arch15 )
+                       "" | native | z900 | z990 | z9-109 | z9-ec | z10 | z196 | zEC12 | z13 | z14 | z15 | z16 | z17 | arch5 | arch6 | arch7 | arch8 | arch9 | arch10 | arch11 | arch12 | arch13 | arch14 | arch15 )
                                # OK
                                ;;
                        *)

diff --git a/gcc/config/s390/driver-native.cc b/gcc/config/s390/driver-native.cc
index 49e8fa01a19b3d0e817b196a5c53e750d09c49ac..7a7ceea9739c803efde5798b80c416e7ec3c46c8 100644 (file)
--- a/gcc/config/s390/driver-native.cc
+++ b/gcc/config/s390/driver-native.cc
@@ -127,6 +127,10 @@ s390_host_detect_local_cpu (int argc, const char **argv)
            case 0x3932:
              cpu = "arch14";
              break;
+           case 0x9175:
+           case 0x9176:
+             cpu = "arch15";
+             break;
            default:
              cpu = "arch15";
              break;

diff --git a/gcc/config/s390/s390-builtins.def b/gcc/config/s390/s390-builtins.def
index d9af9b13def1b9df474231b6edb6335fee093dd7..cee2326e25c864992dccd75adfcec1b9fd03afce 100644 (file)
--- a/gcc/config/s390/s390-builtins.def
+++ b/gcc/config/s390/s390-builtins.def
@@ -300,8 +300,8 @@
 #define B_VXE2  (1 << 4)  /* Builtins requiring the z15 vector extensions.  */
 #define B_DEP   (1 << 5)  /* Builtin has been deprecated and a warning should be issued.  */
 #define B_NNPA  (1 << 6)  /* Builtins requiring the NNPA Facility.  */
-#define B_VXE3  (1 << 7)  /* Builtins requiring the arch15 vector extensions.  */
-#define B_ARCH15 (1 << 8) /* Builtins requiring arch15.  */
+#define B_VXE3  (1 << 7)  /* Builtins requiring the z17 vector extensions.  */
+#define B_Z17   (1 << 8) /* Builtins requiring z17.  */
 
 /* B_DEF defines a standard (not overloaded) builtin
    B_DEF (<builtin name>, <RTL expander name>, <function attributes>, <builtin flags>, <operand flags, see above>, <fntype>)
@@ -3318,8 +3318,8 @@ B_DEF      (s390_vcnf,                   vcnf_v8hi,         0,
 
 /* arch 15 builtins */
 
-B_DEF      (s390_bdepg,                 bdepg,              0,                  B_ARCH15,           0,                  BT_FN_ULONG_ULONG_ULONG)
-B_DEF      (s390_bextg,                 bextg,              0,                  B_ARCH15,           0,                  BT_FN_ULONG_ULONG_ULONG)
+B_DEF      (s390_bdepg,                 bdepg,              0,                  B_Z17,              0,                  BT_FN_ULONG_ULONG_ULONG)
+B_DEF      (s390_bextg,                 bextg,              0,                  B_Z17,              0,                  BT_FN_ULONG_ULONG_ULONG)
 
 OB_DEF     (s390_vec_blend,             s390_vec_blend_s8,  s390_vec_blend_dbl, B_VXE3,             BT_FN_OV4SI_OV4SI_OV4SI_OV4SI)
 OB_DEF_VAR (s390_vec_blend_s8,          s390_vblendb,       0,                  0,                  BT_OV_V16QI_V16QI_V16QI_V16QI)

diff --git a/gcc/config/s390/s390-c.cc b/gcc/config/s390/s390-c.cc
index 311d74a275e21ea0fd787c3aea5dff0245c9dcd8..a01c44c66abf1a3ad0a57c9901663228a21e7747 100644 (file)
--- a/gcc/config/s390/s390-c.cc
+++ b/gcc/config/s390/s390-c.cc
@@ -962,7 +962,7 @@ s390_resolve_overloaded_builtin (location_t loc, tree ob_fndecl,
 
   if (!TARGET_VXE3 && (ob_flags & B_VXE3))
     {
-      error_at (loc, "%qF requires arch15 or higher", ob_fndecl);
+      error_at (loc, "%qF requires z17 or higher", ob_fndecl);
       return error_mark_node;
     }
 
@@ -1056,7 +1056,7 @@ s390_resolve_overloaded_builtin (location_t loc, tree ob_fndecl,
   if (!TARGET_VXE3
       && bflags_overloaded_builtin_var[last_match_index] & B_VXE3)
     {
-      error_at (loc, "%qs matching variant requires arch15 or higher",
+      error_at (loc, "%qs matching variant requires z17 or higher",
                IDENTIFIER_POINTER (DECL_NAME (ob_fndecl)));
       return error_mark_node;
     }

diff --git a/gcc/config/s390/s390-opts.h b/gcc/config/s390/s390-opts.h
index 437d3b9e4c79c8bea4fd41545dff406248961c75..9cacb2c29d1cb96207329d7386ddeaaeee05c619 100644 (file)
--- a/gcc/config/s390/s390-opts.h
+++ b/gcc/config/s390/s390-opts.h
@@ -39,7 +39,7 @@ enum processor_type
   PROCESSOR_3906_Z14,
   PROCESSOR_8561_Z15,
   PROCESSOR_3931_Z16,
-  PROCESSOR_ARCH15,
+  PROCESSOR_9175_Z17,
   PROCESSOR_NATIVE,
   PROCESSOR_max
 };

diff --git a/gcc/config/s390/s390.cc b/gcc/config/s390/s390.cc
index 0ff3fd54dc3f0eaaf402b58cd994248558d29012..a89ab7bc77ac819d048887778fb57dfbe206e3b6 100644 (file)
--- a/gcc/config/s390/s390.cc
+++ b/gcc/config/s390/s390.cc
@@ -342,7 +342,7 @@ const struct s390_processor processor_table[] =
   { "z14",    "arch12", PROCESSOR_3906_Z14,    &zEC12_cost,  12 },
   { "z15",    "arch13", PROCESSOR_8561_Z15,    &zEC12_cost,  13 },
   { "z16",    "arch14", PROCESSOR_3931_Z16,    &zEC12_cost,  14 },
-  { "arch15", "arch15", PROCESSOR_ARCH15,      &zEC12_cost,  15 },
+  { "z17",    "arch15", PROCESSOR_9175_Z17,    &zEC12_cost,  15 },
   { "native", "",       PROCESSOR_NATIVE,      NULL,         0  }
 };
 
@@ -916,7 +916,7 @@ s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
 
       if ((bflags & B_VXE3) && !TARGET_VXE3)
        {
-         error ("Builtin %qF requires arch15 or higher", fndecl);
+         error ("Builtin %qF requires z17 or higher", fndecl);
          return const0_rtx;
        }
     }
@@ -9204,7 +9204,7 @@ s390_issue_rate (void)
     case PROCESSOR_3906_Z14:
     case PROCESSOR_8561_Z15:
     case PROCESSOR_3931_Z16:
-    case PROCESSOR_ARCH15:
+    case PROCESSOR_9175_Z17:
     default:
       return 1;
     }
@@ -15632,7 +15632,7 @@ s390_get_sched_attrmask (rtx_insn *insn)
        mask |= S390_SCHED_ATTR_MASK_GROUPOFTWO;
       break;
     case PROCESSOR_3931_Z16:
-    case PROCESSOR_ARCH15:
+    case PROCESSOR_9175_Z17:
       if (get_attr_z16_cracked (insn))
        mask |= S390_SCHED_ATTR_MASK_CRACKED;
       if (get_attr_z16_expanded (insn))
@@ -15691,7 +15691,7 @@ s390_get_unit_mask (rtx_insn *insn, int *units)
        mask |= 1 << 3;
       break;
     case PROCESSOR_3931_Z16:
-    case PROCESSOR_ARCH15:
+    case PROCESSOR_9175_Z17:
       *units = 4;
       if (get_attr_z16_unit_lsu (insn))
        mask |= 1 << 0;

diff --git a/gcc/config/s390/s390.h b/gcc/config/s390/s390.h
index 6f7195db04e18486e7b4b8fd36f4fc9ac1b07a7c..85a83a17c2e5c300587f1b8c050700faf22afd1c 100644 (file)
--- a/gcc/config/s390/s390.h
+++ b/gcc/config/s390/s390.h
@@ -45,7 +45,7 @@ enum processor_flags
   PF_NNPA = 32768,
   PF_Z16 = 65536,
   PF_VXE3 = 131072,
-  PF_ARCH15 = 262144
+  PF_Z17 = 262144
 };
 
 /* This is necessary to avoid a warning about comparing different enum
@@ -124,10 +124,10 @@ enum processor_flags
        (s390_arch_flags & PF_VXE3)
 #define TARGET_CPU_VXE3_P(opts) \
        (opts->x_s390_arch_flags & PF_VXE3)
-#define TARGET_CPU_ARCH15 \
-       (s390_arch_flags & PF_ARCH15)
-#define TARGET_CPU_ARCH15_P(opts) \
-       (opts->x_s390_arch_flags & PF_ARCH15)
+#define TARGET_CPU_Z17 \
+       (s390_arch_flags & PF_Z17)
+#define TARGET_CPU_Z17_P(opts) \
+       (opts->x_s390_arch_flags & PF_Z17)
 
 #define TARGET_HARD_FLOAT_P(opts) (!TARGET_SOFT_FLOAT_P(opts))
 
@@ -198,9 +198,9 @@ enum processor_flags
        (TARGET_VX && TARGET_CPU_VXE3)
 #define TARGET_VXE3_P(opts)                                            \
        (TARGET_VX_P (opts) && TARGET_CPU_VXE3_P (opts))
-#define TARGET_ARCH15 (TARGET_ZARCH && TARGET_CPU_ARCH15)
-#define TARGET_ARCH15_P(opts)                                          \
-       (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_ARCH15_P (opts))
+#define TARGET_Z17 (TARGET_ZARCH && TARGET_CPU_Z17)
+#define TARGET_Z17_P(opts)                                             \
+       (TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z17_P (opts))
 
 #if defined(HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13)
 #define TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS TARGET_Z13

diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 9d4958033873c9164f1100e08547d61ec65b4ecb..833f801d3a8e8b19558087949fbbd4c311f217f2 100644 (file)
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -603,7 +603,7 @@
   (const (symbol_ref "s390_tune_attr")))
 
 (define_attr "cpu_facility"
-  "standard,ieee,zarch,cpu_zarch,longdisp,extimm,dfp,z10,z196,zEC12,vx,z13,z14,vxe,z15,vxe2,z16,nnpa,vxe3,arch15"
+  "standard,ieee,zarch,cpu_zarch,longdisp,extimm,dfp,z10,z196,zEC12,vx,z13,z14,vxe,z15,vxe2,z16,nnpa,vxe3,z17"
   (const_string "standard"))
 
 (define_attr "enabled" ""
@@ -681,8 +681,8 @@
              (match_test "TARGET_VXE3"))
         (const_int 1)
 
-        (and (eq_attr "cpu_facility" "arch15")
-             (match_test "TARGET_ARCH15"))
+        (and (eq_attr "cpu_facility" "z17")
+             (match_test "TARGET_Z17"))
         (const_int 1)
 ]
        (const_int 0)))
@@ -2056,7 +2056,7 @@
   [(set (match_operand:DI 0 "register_operand" "=d")
        (ashift:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "a"))
                   (const_int LXAMODEITER)))]
-  "TARGET_ARCH15 && TARGET_64BIT"
+  "TARGET_Z17 && TARGET_64BIT"
   "lxa<lxamode>\t%0,0(%1,0)"
   [(set_attr "op_type" "RXY")])
 
@@ -2066,7 +2066,7 @@
        (ashift:DI (sign_extend:DI (plus:SI (match_operand:SI 1 "register_operand" "a")
                                            (match_operand:SI 2 "const_int_operand")))
                   (const_int LXAMODEITER)))]
-  "TARGET_ARCH15 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
+  "TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
   "lxa<lxamode>\t%0,%2(%1,0)"
   [(set_attr "op_type" "RXY")])
 
@@ -2076,7 +2076,7 @@
        (plus:DI (ashift:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "a"))
                            (const_int LXAMODEITER))
                 (match_operand:DI 2 "register_operand" "a")))]
-  "TARGET_ARCH15 && TARGET_64BIT"
+  "TARGET_Z17 && TARGET_64BIT"
   "lxa<lxamode>\t%0,0(%1,%2)"
   [(set_attr "op_type" "RXY")])
 
@@ -2087,7 +2087,7 @@
                                                     (match_operand:SI 2 "const_int_operand")))
                            (const_int LXAMODEITER))
                 (match_operand:DI 3 "register_operand" "a")))]
-  "TARGET_ARCH15 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
+  "TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
   "lxa<lxamode>\t%0,%2(%1,%3)"
   [(set_attr "op_type" "RXY")])
 
@@ -2096,7 +2096,7 @@
        (plus:DI (sign_extend:DI (plus:SI (match_operand:SI 1 "register_operand" "a")
                                          (match_operand:SI 2 "const_int_operand")))
                 (match_operand:DI 3 "register_operand" "a")))]
-  "TARGET_ARCH15 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
+  "TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
   "lxab\t%0,%2(%1,%3)"
   [(set_attr "op_type" "RXY")])
 
@@ -2113,7 +2113,7 @@
                                      0)
                           (const_int LXAMODEITER))
                (const_int <LLXAMASK>)))]
-  "TARGET_ARCH15 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
+  "TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
   "llxa<lxamode>\t%0,%2(%1,0)"
   [(set_attr "op_type" "RXY")])
 
@@ -2124,7 +2124,7 @@
                                    (const_int LXAMODEITER))
                         (const_int <LLXAMASK>))
                 (match_operand:DI 2 "register_operand" "a")))]
-  "TARGET_ARCH15 && TARGET_64BIT"
+  "TARGET_Z17 && TARGET_64BIT"
   "llxa<lxamode>\t%0,0(%1,%2)"
   [(set_attr "op_type" "RXY")])
 
@@ -2137,7 +2137,7 @@
                                    (const_int LXAMODEITER))
                         (const_int <LLXAMASK>))
                 (match_operand:DI 3 "register_operand" "a")))]
-  "TARGET_ARCH15 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
+  "TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
   "llxa<lxamode>\t%0,%2(%1,%3)"
   [(set_attr "op_type" "RXY")])
 
@@ -2146,7 +2146,7 @@
        (plus:DI (zero_extend:DI (plus:SI (match_operand:SI 1 "register_operand" "a")
                                          (match_operand:SI 2 "const_int_operand")))
                 (match_operand:DI 3 "register_operand" "a")))]
-  "TARGET_ARCH15 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
+  "TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
   "llxab\t%0,%2(%1,%3)"
   [(set_attr "op_type" "RXY")])
 
@@ -4940,7 +4940,7 @@
        (unspec:DI [(match_operand:DI 1 "register_operand" "d")
                    (match_operand:DI 2 "register_operand" "d")]
                   UNSPEC_BDEPG))]
-  "TARGET_ARCH15 && TARGET_64BIT"
+  "TARGET_Z17 && TARGET_64BIT"
   "bdepg\t%0,%1,%2"
   [(set_attr "op_type" "RRF")])
 
@@ -4953,7 +4953,7 @@
        (unspec:DI [(match_operand:DI 1 "register_operand" "d")
                    (match_operand:DI 2 "register_operand" "d")]
                   UNSPEC_BEXTG))]
-  "TARGET_ARCH15 && TARGET_64BIT"
+  "TARGET_Z17 && TARGET_64BIT"
   "bextg\t%0,%1,%2"
   [(set_attr "op_type" "RRF")])
 
@@ -9580,7 +9580,7 @@
        (clz:DI (match_operand:DI 1 "register_operand" "d")))]
   "TARGET_EXTIMM && TARGET_ZARCH"
 {
-  if (!(TARGET_ARCH15 && TARGET_64BIT))
+  if (!(TARGET_Z17 && TARGET_64BIT))
     {
       rtx_insn *insn;
       rtx clz_equal;
@@ -9601,7 +9601,7 @@
 (define_insn "*clzg"
   [(set (match_operand:DI 0 "register_operand" "=d")
        (clz:DI (match_operand:DI 1 "register_operand" "d")))]
-  "TARGET_ARCH15 && TARGET_64BIT"
+  "TARGET_Z17 && TARGET_64BIT"
   "clzg\t%0,%1"
   [(set_attr "op_type" "RRE")])
 
@@ -9630,7 +9630,7 @@
 (define_insn "ctzdi2"
   [(set (match_operand:DI 0 "register_operand" "=d")
        (ctz:DI (match_operand:DI 1 "register_operand" "d")))]
-  "TARGET_ARCH15 && TARGET_64BIT"
+  "TARGET_Z17 && TARGET_64BIT"
   "ctzg\t%0,%1"
   [(set_attr "op_type" "RRE")])
 

diff --git a/gcc/config/s390/s390.opt b/gcc/config/s390/s390.opt
index f064597f8367046763983d1903bb67c373f62454..6753a9326be2d441b8eb6fec846e20a3eef9d4ab 100644 (file)
--- a/gcc/config/s390/s390.opt
+++ b/gcc/config/s390/s390.opt
@@ -122,7 +122,10 @@ EnumValue
 Enum(processor_type) String(z16) Value(PROCESSOR_3931_Z16)
 
 EnumValue
-Enum(processor_type) String(arch15) Value(PROCESSOR_ARCH15)
+Enum(processor_type) String(arch15) Value(PROCESSOR_9175_Z17)
+
+EnumValue
+Enum(processor_type) String(z17) Value(PROCESSOR_9175_Z17)
 
 EnumValue
 Enum(processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index fbaa29f49258b3fce1f3db768f9ef12a93d47ee7..67155eeeda7d4d38a9904d7ddde1ab96ffd37eca 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -33344,7 +33344,7 @@ system representing a certain processor type.  Possible values for
 @samp{z9-109}, @samp{z9-ec}/@samp{arch7}, @samp{z10}/@samp{arch8},
 @samp{z196}/@samp{arch9}, @samp{zEC12}, @samp{z13}/@samp{arch11},
 @samp{z14}/@samp{arch12}, @samp{z15}/@samp{arch13},
-@samp{z16}/@samp{arch14}, and @samp{native}.
+@samp{z16}/@samp{arch14}, @samp{z17}/@samp{arch15}, and @samp{native}.
 
 The default is @option{-march=z900}.