arm64: dts: renesas: ironhide: Enable to use SCMI

Enable SCMI via MFIS-SCP and S-TCM transport area.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260519074702.3308-6-wsa+renesas@sang-engineering.com
[geert: Drop scmi_clk node]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a78000-ironhide.dts b/arch/arm64/boot/dts/renesas/r8a78000-ironhide.dts
index ed027a6c356ed149da9ee28c577dfe94b7963150..d2b3fc08954a1c008d1249cf32c3985dc350f96f 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a78000-ironhide.dts
+++ b/arch/arm64/boot/dts/renesas/r8a78000-ironhide.dts
@@ -6,6 +6,7 @@
  */
 
 /dts-v1/;
+#include <dt-bindings/soc/renesas,r8a78000-mfis.h>
 #include "r8a78000.dtsi"
 
 / {
@@ -20,6 +21,19 @@
                stdout-path = "serial0:1843200n8";
        };
 
+       firmware {
+               scmi: scmi {
+                       compatible = "arm,scmi";
+                       mboxes = <&mfis_scp 2 MFIS_CHANNEL_TX>,
+                                <&mfis_scp 2 MFIS_CHANNEL_RX>;
+                       mbox-names = "tx", "rx";
+                       shmem = <&scmi_tx_shmem>, <&scmi_rx_shmem>;
+                       arm,no-completion-irq;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+       };
+
        memory@40000000 {
                device_type = "memory";
                reg = <0x0 0x40000000 0x0 0x80000000>;
@@ -109,6 +123,22 @@
        status = "okay";
 };
 
+&mfis_scp {
+       status = "okay";
+};
+
 &scif_clk {
        clock-frequency = <26000000>;
 };
+
+&stcm_transport {
+       scmi_tx_shmem: sram@1200 {
+               compatible = "arm,scmi-shmem";
+               reg = <0x1200 0x0100>;
+       };
+
+       scmi_rx_shmem: sram@1300 {
+               compatible = "arm,scmi-shmem";
+               reg = <0x1300 0x100>;
+       };
+};