drm/amdgpu: do not use amdgpu_bo_gpu_offset_no_check individually

This should not be used indiviually, use amdgpu_bo_gpu_offset
with bo reserved.

v3 - unpin bo in queue destroy (Christian)
v2 - pin bo so that offset returned won't change after unlock (Christian)

Signed-off-by: Saleemkhan Jamadar <saleemkhan083@gmail.com>
Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
index 3040437d99c2390806dd025cb0119d459da2ae1e..bc78585673215e17728e9e0d87e608e7485e6132 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
@@ -129,7 +129,7 @@ uint32_t amdgpu_doorbell_index_on_bar(struct amdgpu_device *adev,
 {
        int db_bo_offset;
 
-       db_bo_offset = amdgpu_bo_gpu_offset_no_check(db_bo);
+       db_bo_offset = amdgpu_bo_gpu_offset(db_bo);
 
        /* doorbell index is 32 bit but doorbell's size can be 32 bit
         * or 64 bit, so *db_size(in byte)/4 for alignment.

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
index 545a238ba1256fc551df9db2ebb56c7573233189..c5dd5815056c5496b6d4ec01cf823f3d115be4d4 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
@@ -586,6 +586,14 @@ amdgpu_userq_destroy(struct drm_file *filp, int queue_id)
                amdgpu_bo_unreserve(queue->db_obj.obj);
        }
        amdgpu_bo_unref(&queue->db_obj.obj);
+
+       r = amdgpu_bo_reserve(queue->wptr_obj.obj, true);
+       if (!r) {
+               amdgpu_bo_unpin(queue->wptr_obj.obj);
+               amdgpu_bo_unreserve(queue->wptr_obj.obj);
+       }
+       amdgpu_bo_unref(&queue->wptr_obj.obj);
+
        atomic_dec(&uq_mgr->userq_count[queue->queue_type]);
 #if defined(CONFIG_DEBUG_FS)
        debugfs_remove_recursive(queue->debugfs_queue);

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
index 8b0aeb89025ad4210d3a6f4f79ec7016096bea31..f2309d72bbe675760fb22b8123424c2b8d251017 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
@@ -94,8 +94,28 @@ mes_userq_create_wptr_mapping(struct amdgpu_device *adev,
                return ret;
        }
 
-       queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset_no_check(wptr_obj->obj);
+       ret = amdgpu_bo_reserve(wptr_obj->obj, true);
+       if (ret) {
+               DRM_ERROR("Failed to reserve wptr bo\n");
+               return ret;
+       }
+
+       /* TODO use eviction fence instead of pinning. */
+       ret = amdgpu_bo_pin(wptr_obj->obj, AMDGPU_GEM_DOMAIN_GTT);
+       if (ret) {
+               drm_file_err(uq_mgr->file, "[Usermode queues] Failed to pin wptr bo\n");
+               goto unresv_bo;
+       }
+
+       queue->wptr_obj.gpu_addr = amdgpu_bo_gpu_offset(wptr_obj->obj);
+       amdgpu_bo_unreserve(wptr_obj->obj);
+
        return 0;
+
+unresv_bo:
+       amdgpu_bo_unreserve(wptr_obj->obj);
+       return ret;
+
 }
 
 static int convert_to_mes_priority(int priority)