arm64: dts: ti: k3-am68-phyboard-izar: Add LVDS-Display

Add an overlay to use a powertip,ph128800t006-zhc01 10.1" LVDS display.

Signed-off-by: Dominik Haller <d.haller@phytec.de>
Link: https://patch.msgid.link/20260320212349.420951-4-d.haller@phytec.de
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 260e211ca277d510eb2c8d5357c047bab3edcda8..e043192546919ce5c7087984565325eea92731c1 100644 (file)
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -132,6 +132,9 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk-csi2-dual-imx219.dtbo
 
 # Boards with J721s2 SoC
 dtb-$(CONFIG_ARCH_K3) += k3-am68-phyboard-izar.dtb
+dtb-$(CONFIG_ARCH_K3) += k3-am68-phyboard-izar-lvds-ph128800t006.dtb
+k3-am68-phyboard-izar-lvds-ph128800t006-dtbs := k3-am68-phyboard-izar.dtb \
+       k3-am68-phyboard-izar-lvds-ph128800t006.dtbo
 dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board.dtb
 dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board-pcie1-ep.dtbo
 dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb
@@ -306,6 +309,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
        k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtb \
        k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \
        k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \
+       k3-am68-phyboard-izar-lvds-ph128800t006.dtb \
        k3-am68-sk-base-board-csi2-dual-imx219.dtb \
        k3-am68-sk-base-board-pcie1-ep.dtb \
        k3-am69-sk-csi2-dual-imx219.dtb \

diff --git a/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar-lvds-ph128800t006.dtso b/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar-lvds-ph128800t006.dtso
new file mode 100644 (file)
index 0000000..9eb28aa
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar-lvds-ph128800t006.dtso
@@ -0,0 +1,125 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (C) 2026 PHYTEC Messtechnik GmbH
+ * Author: Dominik Haller <d.haller@phytec.de>
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "k3-pinctrl.h"
+
+&{/} {
+       backlight_lvds: backlight {
+               compatible = "pwm-backlight";
+               brightness-levels = <0 32 64 96 128 160 192 224 255>;
+               default-brightness-level = <6>;
+               enable-gpios = <&exp2 12 GPIO_ACTIVE_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&backlight_pins_default>;
+               power-supply = <&bl_12v>;
+               pwms = <&main_ehrpwm0 1 44000 0>;
+       };
+
+       bl_12v: regulator-backlight {
+               compatible = "regulator-fixed";
+               enable-active-high;
+               gpio = <&exp2 13 GPIO_ACTIVE_HIGH>;
+               regulator-name = "BL_12V";
+               regulator-min-microvolt = <12000000>;
+               regulator-max-microvolt = <12000000>;
+       };
+
+       panel-lvds {
+               compatible = "powertip,ph128800t006-zhc01";
+               backlight = <&backlight_lvds>;
+               power-supply = <&vcc_5v0>;
+
+               port {
+                       panel_in: endpoint {
+                               remote-endpoint = <&panel_bridge_out>;
+                       };
+               };
+       };
+};
+
+&main_pmx0 {
+       backlight_pins_default: backlight-default-pins {
+               pinctrl-single,pins = <
+                       J721S2_IOPAD(0x064, PIN_OUTPUT, 9) /* (W28) MCAN0_TX.EHRPWM0_B */
+               >;
+       };
+};
+
+&dphy_tx0 {
+       status = "okay";
+};
+
+&dss {
+       status = "okay";
+};
+
+&dss_ports {
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       port@2 {
+               reg = <2>;
+               dpi2_out: endpoint {
+                       remote-endpoint = <&dsi0_in>;
+               };
+       };
+};
+
+&dsi0 {
+       status = "okay";
+};
+
+&dsi0_ports {
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       port@0 {
+               reg = <0>;
+               dsi0_out: endpoint {
+                       remote-endpoint = <&panel_bridge_in>;
+               };
+       };
+
+       port@1 {
+               reg = <1>;
+               dsi0_in: endpoint {
+                       remote-endpoint = <&dpi2_out>;
+               };
+       };
+};
+
+&main_ehrpwm0 {
+       status = "okay";
+};
+
+&sn65dsi83 {
+       status = "okay";
+
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+                       panel_bridge_in: endpoint {
+                               remote-endpoint = <&dsi0_out>;
+                               data-lanes = <1 2 3 4>;
+                       };
+               };
+
+               port@2 {
+                       reg = <2>;
+                       panel_bridge_out: endpoint {
+                               remote-endpoint = <&panel_in>;
+                       };
+               };
+       };
+};