The SWDT on V3H has no reset bit. Make resets optional on this SoC.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
- clocks
- interrupts
- power-domains
- - resets
allOf:
- $ref: watchdog.yaml#
+ - if:
+ not:
+ properties:
+ compatible:
+ contains:
+ const: renesas,r8a77980-wdt
+ then:
+ required:
+ - resets
+
additionalProperties: false
examples: