]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
pinctrl: renesas: rzg2l: Fix PMC restore
authorBiju Das <biju.das.jz@bp.renesas.com>
Sun, 21 Sep 2025 11:15:52 +0000 (12:15 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 18 Dec 2025 13:02:27 +0000 (14:02 +0100)
[ Upstream commit cea950101108b7bfffe26ec4007b8e263a4b56a8 ]

PMC restore needs unlocking the register using the PWPR register.

Fixes: ede014cd1ea6422d ("pinctrl: renesas: rzg2l: Add function pointer for PMC register write")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20250921111557.103069-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/pinctrl/renesas/pinctrl-rzg2l.c

index f524af6f586f4aa18a67262e348e821003e61de0..94cb77949f59531dfa4cd0258fad4c67200f1e4a 100644 (file)
@@ -2993,7 +2993,11 @@ static void rzg2l_pinctrl_pm_setup_regs(struct rzg2l_pinctrl *pctrl, bool suspen
                 * Now cache the registers or set them in the order suggested by
                 * HW manual (section "Operation for GPIO Function").
                 */
-               RZG2L_PCTRL_REG_ACCESS8(suspend, pctrl->base + PMC(off), cache->pmc[port]);
+               if (suspend)
+                       RZG2L_PCTRL_REG_ACCESS8(suspend, pctrl->base + PMC(off), cache->pmc[port]);
+               else
+                       pctrl->data->pmc_writeb(pctrl, cache->pmc[port], PMC(off));
+
                if (has_iolh) {
                        RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + IOLH(off),
                                                 cache->iolh[0][port]);