i386: Use offsetable address constraint for double-word memory operands

Double-word memory operands are accessed as their high and low part, so the
memory location has to be offsettable.  Use "o" constraint instead of "m"
for double-word memory operands.

gcc/ChangeLog:

	* config/i386/i386.md (*insvdi_lowpart_1): Use "o" constraint
	instead of "m" for double-word mode memory operands.
	(*add<dwi>3_doubleword_zext): Ditto.
	(*addv<dwi>4_doubleword_1): Use "jO" constraint instead of "jM"
	for double-word mode memory operands.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 0fae3c1eb878e814e917d3984d47f66cdb723eda..8d269feee83707c2c33f72e203c2fc77bb22dfdb 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3707,7 +3707,7 @@
   [(set (match_operand:DI 0 "nonimmediate_operand" "=ro,r,r,&r")
        (any_or_plus:DI
          (and:DI
-           (match_operand:DI 1 "nonimmediate_operand" "r,m,r,m")
+           (match_operand:DI 1 "nonimmediate_operand" "r,o,r,o")
            (match_operand:DI 3 "const_int_operand" "n,n,n,n"))
          (zero_extend:DI
            (match_operand:SI 2 "nonimmediate_operand" "r,r,m,m"))))]
@@ -6461,7 +6461,7 @@
        (plus:<DWI>
          (zero_extend:<DWI>
            (match_operand:DWIH 2 "nonimmediate_operand" "rm,r,rm,r"))
-         (match_operand:<DWI> 1 "nonimmediate_operand" "0,0,r,m")))
+         (match_operand:<DWI> 1 "nonimmediate_operand" "0,0,r,o")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (UNKNOWN, <DWI>mode, operands, TARGET_APX_NDD)"
   "#"
@@ -7703,7 +7703,7 @@
        (eq:CCO
          (plus:<QPWI>
            (sign_extend:<QPWI>
-             (match_operand:<DWI> 1 "nonimmediate_operand" "%0,rjM"))
+             (match_operand:<DWI> 1 "nonimmediate_operand" "%0,rjO"))
            (match_operand:<QPWI> 3 "const_scalar_int_operand" "n,n"))
          (sign_extend:<QPWI>
            (plus:<DWI>