drm/amdgpu: Reinit FW shared flags on VCN v5.0.1

[ Upstream commit 6ef5ccaad76d907d4257f20de992f89c0f7a7f8e ]

After a full device reset, shared memory region will clear out and it's
not possible to reliably save the region in case of RAS errors.
Reinitialize the flags if required.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
index 8b0b3739a53776c70fc0a1b3fc1030d39cb0b155..cdbc10d7c9fb700f9e52159aeb8bb071540aac2e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
@@ -65,6 +65,22 @@ static int vcn_v5_0_1_early_init(struct amdgpu_ip_block *ip_block)
        return amdgpu_vcn_early_init(adev);
 }
 
+static void vcn_v5_0_1_fw_shared_init(struct amdgpu_device *adev, int inst_idx)
+{
+       struct amdgpu_vcn5_fw_shared *fw_shared;
+
+       fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr;
+
+       if (fw_shared->sq.is_enabled)
+               return;
+       fw_shared->present_flag_0 =
+               cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE);
+       fw_shared->sq.is_enabled = 1;
+
+       if (amdgpu_vcnfw_log)
+               amdgpu_vcn_fwlog_init(&adev->vcn.inst[inst_idx]);
+}
+
 /**
  * vcn_v5_0_1_sw_init - sw init for VCN block
  *
@@ -95,8 +111,6 @@ static int vcn_v5_0_1_sw_init(struct amdgpu_ip_block *ip_block)
                return r;
 
        for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
-               volatile struct amdgpu_vcn5_fw_shared *fw_shared;
-
                vcn_inst = GET_INST(VCN, i);
 
                ring = &adev->vcn.inst[i].ring_enc[0];
@@ -111,12 +125,7 @@ static int vcn_v5_0_1_sw_init(struct amdgpu_ip_block *ip_block)
                if (r)
                        return r;
 
-               fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr;
-               fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE);
-               fw_shared->sq.is_enabled = true;
-
-               if (amdgpu_vcnfw_log)
-                       amdgpu_vcn_fwlog_init(&adev->vcn.inst[i]);
+               vcn_v5_0_1_fw_shared_init(adev, i);
        }
 
        /* TODO: Add queue reset mask when FW fully supports it */
@@ -188,6 +197,9 @@ static int vcn_v5_0_1_hw_init(struct amdgpu_ip_block *ip_block)
                                 9 * vcn_inst),
                                adev->vcn.inst[i].aid_id);
 
+               /* Re-init fw_shared, if required */
+               vcn_v5_0_1_fw_shared_init(adev, i);
+
                r = amdgpu_ring_test_helper(ring);
                if (r)
                        return r;