]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/i915/dp_mst: Simplify computing the min/max compressed bpp limits
authorImre Deak <imre.deak@intel.com>
Fri, 9 May 2025 18:03:33 +0000 (21:03 +0300)
committerImre Deak <imre.deak@intel.com>
Mon, 12 May 2025 12:22:48 +0000 (15:22 +0300)
Adjusting the compressed bpp range min/max limits in
intel_dp_dsc_nearest_valid_bpp() is unnecessary:

- The source/sink min/max values are enforced already by the
  link_config_limits::min_bpp_x16/max_bpp_x16 values computed early in
  intel_dp_compute_config_link_bpp_limits().
- The fixed set of valid bpps are enforced already - for all bpps in the
  min .. max range by intel_dp_dsc_valid_compressed_bpp() called from
  intel_dp_mtp_tu_compute_config().

The only thing needed is limiting max compressed bpp below the
uncompressed pipe bpp, do that one thing only instead of calling
intel_dp_dsc_nearest_valid_bpp().

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://lore.kernel.org/r/20250509180340.554867-7-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_dp.c
drivers/gpu/drm/i915/display/intel_dp.h
drivers/gpu/drm/i915/display/intel_dp_mst.c

index c67c3b5b2dafaed510b7967fb863048ad97476ff..f8de29d8a4da46be8320efdbf330e6e328577cf9 100644 (file)
@@ -847,7 +847,7 @@ small_joiner_ram_size_bits(struct intel_display *display)
                return 6144 * 8;
 }
 
-u32 intel_dp_dsc_nearest_valid_bpp(struct intel_display *display, u32 bpp, u32 pipe_bpp)
+static u32 intel_dp_dsc_nearest_valid_bpp(struct intel_display *display, u32 bpp, u32 pipe_bpp)
 {
        u32 bits_per_pixel = bpp;
        int i;
index 4d8c3f2b90dff0c822bd1d29efa2aea607dc0129..2fe6720a88fc1ad4e68f18762cd9f2b3005f0e81 100644 (file)
@@ -174,8 +174,6 @@ bool intel_dp_supports_dsc(struct intel_dp *intel_dp,
                           const struct intel_connector *connector,
                           const struct intel_crtc_state *crtc_state);
 
-u32 intel_dp_dsc_nearest_valid_bpp(struct intel_display *display, u32 bpp, u32 pipe_bpp);
-
 void intel_ddi_update_pipe(struct intel_atomic_state *state,
                           struct intel_encoder *encoder,
                           const struct intel_crtc_state *crtc_state,
index ff88888e4b293fd2b08517536f10812129e9edfe..42351229177d8376996f86e1c9ea539f5e26efbc 100644 (file)
@@ -491,11 +491,7 @@ static int mst_stream_dsc_compute_link_config(struct intel_dp *intel_dp,
        drm_dbg_kms(display->drm, "DSC Sink supported compressed min bpp %d compressed max bpp %d\n",
                    min_compressed_bpp, max_compressed_bpp);
 
-       /* Align compressed bpps according to our own constraints */
-       max_compressed_bpp = intel_dp_dsc_nearest_valid_bpp(display, max_compressed_bpp,
-                                                           crtc_state->pipe_bpp);
-       min_compressed_bpp = intel_dp_dsc_nearest_valid_bpp(display, min_compressed_bpp,
-                                                           crtc_state->pipe_bpp);
+       max_compressed_bpp = min(max_compressed_bpp, crtc_state->pipe_bpp - 1);
 
        crtc_state->lane_count = limits->max_lane_count;
        crtc_state->port_clock = limits->max_rate;