*/
intel_de_rmw(display, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);
}
+
+void intel_display_cfl_init_clock_gating(struct intel_display *display)
+{
+ /*
+ * WaFbcTurnOffFbcWatermark:cfl
+ * Display WA #0562: cfl
+ */
+ intel_de_rmw(display, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);
+}
void intel_display_skl_init_clock_gating(struct intel_display *display);
void intel_display_kbl_init_clock_gating(struct intel_display *display);
+void intel_display_cfl_init_clock_gating(struct intel_display *display);
#endif /* __INTEL_DISPLAY_CLOCK_GATING_H__ */
/* WAC6entrylatency:cfl */
intel_uncore_rmw(&i915->uncore, FBC_LLC_READ_CTRL, 0, FBC_LLC_FULLY_OPEN);
- /*
- * WaFbcTurnOffFbcWatermark:cfl
- * Display WA #0562: cfl
- */
- intel_uncore_rmw(&i915->uncore, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);
+ intel_display_cfl_init_clock_gating(i915->display);
}
static void kbl_init_clock_gating(struct drm_i915_private *i915)