arm64: dts: qcom: qcm2290: add LPASS LPI pin controller

Add the Low Power Audio SubSystem Low Power Island (LPASS LPI) pin
controller device node required for audio subsystem on Qualcomm
QRB2210 RB1. QRB2210 is based on qcm2290 which is based on sm6115.

While at this, also add description of lpi_i2s2 pins (active state)
required for audio playback via HDMI/I2S.

Cc: Srinivas Kandagatla <srini@kernel.org>
Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
Link: https://lore.kernel.org/r/20251022-rb1_hdmi_audio-v3-2-0d38f777a547@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
index 5131388f1502efad5531aa16b427dcac3b414b43..c6544ffa6f328e901048b3e6bfd516bf11af3901 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
@@ -19,6 +19,7 @@
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/soc/qcom,apr.h>
 #include <dt-bindings/sound/qcom,q6asm.h>
+#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
 
 / {
        interrupt-parent = <&intc>;
@@ -687,6 +688,43 @@
                        };
                };
 
+               lpass_tlmm: pinctrl@a7c0000 {
+                       compatible = "qcom,qcm2290-lpass-lpi-pinctrl",
+                                    "qcom,sm6115-lpass-lpi-pinctrl";
+                       reg = <0x0 0x0a7c0000 0x0 0x20000>,
+                             <0x0 0x0a950000 0x0 0x10000>;
+
+                       clocks = <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+                       clock-names = "audio";
+
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       gpio-ranges = <&lpass_tlmm 0 0 19>;
+
+                       lpi_i2s2_active: lpi-i2s2-active-state {
+                               sck-pins {
+                                       pins = "gpio10";
+                                       function = "i2s2_clk";
+                                       bias-disable;
+                                       drive-strength = <8>;
+                               };
+
+                               ws-pins {
+                                       pins = "gpio11";
+                                       function = "i2s2_ws";
+                                       bias-disable;
+                                       drive-strength = <8>;
+                               };
+
+                               data-pins {
+                                       pins = "gpio12";
+                                       function = "i2s2_data";
+                                       bias-disable;
+                                       drive-strength = <8>;
+                               };
+                       };
+               };
+
                gcc: clock-controller@1400000 {
                        compatible = "qcom,gcc-qcm2290";
                        reg = <0x0 0x01400000 0x0 0x1f0000>;