]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
x86/bugs: Add SRSO_MITIGATION_NOSMT
authorDavid Kaplan <david.kaplan@amd.com>
Wed, 25 Jun 2025 15:58:03 +0000 (10:58 -0500)
committerIngo Molnar <mingo@kernel.org>
Thu, 26 Jun 2025 08:56:39 +0000 (10:56 +0200)
AMD Zen1 and Zen2 CPUs with SMT disabled are not vulnerable to SRSO.

Instead of overloading the X86_FEATURE_SRSO_NO bit to indicate this,
define a separate mitigation to make the code cleaner.

Signed-off-by: David Kaplan <david.kaplan@amd.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Borislav Petkov (AMD) <bp@alien8.de>
Cc: H . Peter Anvin <hpa@zytor.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Josh Poimboeuf <jpoimboe@kernel.org>
Cc: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20250625155805.600376-2-david.kaplan@amd.com
arch/x86/kernel/cpu/bugs.c

index bdef2c9aa1b8b85a8e0ee7c959ea7afde81d443e..6c991afb7b78e3b8a6017ed47988b14b7d516c70 100644 (file)
@@ -2851,6 +2851,7 @@ enum srso_mitigation {
        SRSO_MITIGATION_UCODE_NEEDED,
        SRSO_MITIGATION_SAFE_RET_UCODE_NEEDED,
        SRSO_MITIGATION_MICROCODE,
+       SRSO_MITIGATION_NOSMT,
        SRSO_MITIGATION_SAFE_RET,
        SRSO_MITIGATION_IBPB,
        SRSO_MITIGATION_IBPB_ON_VMEXIT,
@@ -2862,6 +2863,7 @@ static const char * const srso_strings[] = {
        [SRSO_MITIGATION_UCODE_NEEDED]          = "Vulnerable: No microcode",
        [SRSO_MITIGATION_SAFE_RET_UCODE_NEEDED] = "Vulnerable: Safe RET, no microcode",
        [SRSO_MITIGATION_MICROCODE]             = "Vulnerable: Microcode, no safe RET",
+       [SRSO_MITIGATION_NOSMT]                 = "Mitigation: SMT disabled",
        [SRSO_MITIGATION_SAFE_RET]              = "Mitigation: Safe RET",
        [SRSO_MITIGATION_IBPB]                  = "Mitigation: IBPB",
        [SRSO_MITIGATION_IBPB_ON_VMEXIT]        = "Mitigation: IBPB on VMEXIT only",
@@ -2914,8 +2916,7 @@ static void __init srso_select_mitigation(void)
                 * IBPB microcode has been applied.
                 */
                if (boot_cpu_data.x86 < 0x19 && !cpu_smt_possible()) {
-                       setup_force_cpu_cap(X86_FEATURE_SRSO_NO);
-                       srso_mitigation = SRSO_MITIGATION_NONE;
+                       srso_mitigation = SRSO_MITIGATION_NOSMT;
                        return;
                }
        } else {
@@ -2968,8 +2969,7 @@ static void __init srso_update_mitigation(void)
                srso_mitigation = SRSO_MITIGATION_IBPB;
 
        if (boot_cpu_has_bug(X86_BUG_SRSO) &&
-           !cpu_mitigations_off() &&
-           !boot_cpu_has(X86_FEATURE_SRSO_NO))
+           !cpu_mitigations_off())
                pr_info("%s\n", srso_strings[srso_mitigation]);
 }
 
@@ -3265,9 +3265,6 @@ static ssize_t retbleed_show_state(char *buf)
 
 static ssize_t srso_show_state(char *buf)
 {
-       if (boot_cpu_has(X86_FEATURE_SRSO_NO))
-               return sysfs_emit(buf, "Mitigation: SMT disabled\n");
-
        return sysfs_emit(buf, "%s\n", srso_strings[srso_mitigation]);
 }