Merge patch series "can: rcar_canfd: Add support for Transceiver Delay Compensation"

Geert Uytterhoeven <geert+renesas@glider.be> says:

This patch series adds CAN-FD Transceiver Delay Compensation support to
the R-Car CAN-FD driver, after the customary cleanups and refactorings.

Changes compared to v1 [1]:
  - Dropped patch "can: rcar_canfd: Use ndev parameter in
    rcar_canfd_set_bittiming()",
  - New patch "[PATCH v2 02/10] can: rcar_canfd: Remove bittiming debug
    prints",
  - New patch "[PATCH v2 07/10] can: rcar_canfd: Rename
    rcar_canfd_setrnc() to rcar_canfd_set_rnc()",
  - Add Reviewed-by,
  - Replace function-like RCANFD_F_*() macros by rcar_canfd_f_*()
    inline functions,
  - Replace function-like macro RCANFD_FDSTS_TDCR() by bitmask
    RCANFD_FDSTS_TDCR and helper function rcar_canfd_get_tdcr(),
  - Replace function-like macro RCANFD_FDSTS_TDCVF() by two bit
    definitions,
  - Drop debug print of tdc mode and tdco value.

This has been tested on R-Car V4H (White Hawk), V4M (Gray Hawk Single),
and E3 (Ebisu-4D[2]), using various data bit rates.  Without proper TDC
configuration, transmitting at 8 Mbps makes the CAN-FD controller enter
BUS-OFF state.  The TDCV value as measured by the CAN-FD controller is 4
on all boards tested (base clock 40 MHz, i.e. 25 ns period), and ca. 90
ns as measured by a logic analyzer on Gray Hawk Single.

Note that the BSP (predating upstream TDC support), uses a much simpler
method: for transfer rates >= 5 Mbps on R-Car Gen4, it enables TDC with
a hardcoded (hardware) TDCO value of 2 (i.e. actual 3), which matches
the behavior of this series at 8 Mbps.

[1] "[PATCH 0/9] can: rcar_canfd: Add support for Transceiver Delay Compensation"
    https://lore.kernel.org/cover.1748863848.git.geert+renesas@glider.be

[2] r8a77990.dtsi configures the CANFD core clock to 40 MHz, limiting
    transfer rates to 4 Mbps.  Enable support for 8 Mbps by adding to
    ebisu.dtsi:

	&canfd {
		assigned-clock-rates = <80000000>;
	}

    I plan to send patches to update this on all R-Car Gen3 and RZ/G2
    SoCs once this series has reached upstream.

Link: https://patch.msgid.link/cover.1749655315.git.geert+renesas@glider.be
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>