libgomp.texi (gcn, nvptx): Mention self_maps alongside USM

libgomp/ChangeLog:

	* libgomp.texi (gcn, nvptx): Mention self_maps clause
	besides unified_shared_memory in the requirements item.

diff --git a/libgomp/libgomp.texi b/libgomp/libgomp.texi
index 3d3a56cc29a3c0d6b6c2d775b635e781dc3257a9..dfd189b646e815e470a1ffc804eaa1229f8caf50 100644 (file)
--- a/libgomp/libgomp.texi
+++ b/libgomp/libgomp.texi
@@ -6888,7 +6888,7 @@ The implementation remark:
       @code{device(ancestor:1)}) are processed serially per @code{target} region
       such that the next reverse offload region is only executed after the previous
       one returned.
-@item OpenMP code that has a @code{requires} directive with
+@item OpenMP code that has a @code{requires} directive with @code{self_maps} or
       @code{unified_shared_memory} is only supported if all AMD GPUs have the
       @code{HSA_AMD_SYSTEM_INFO_SVM_ACCESSIBLE_BY_DEFAULT} property; for
       discrete GPUs, this may require setting the @code{HSA_XNACK} environment
@@ -7045,7 +7045,7 @@ The implementation remark:
       Per device, reverse offload regions are processed serially such that
       the next reverse offload region is only executed after the previous
       one returned.
-@item OpenMP code that has a @code{requires} directive with
+@item OpenMP code that has a @code{requires} directive with @code{self_maps} or
       @code{unified_shared_memory} runs on nvptx devices if and only if
       all of those support the @code{pageableMemoryAccess} property;@footnote{
       @uref{https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#um-requirements}}