arm64: dts: altera: socfpga_stratix10: update internal oscillators

Add the clock-frequency property to the cb_intosc_ls_clk and
cb_intosc_hs_div2_clk device tree nodes.

The f2s_free_clk is implemented by custom logic in the FPGA; so it
should be disabled in the dtsi by default and enabled by a
dts for a specific FPGA design on a specific board.

Signed-off-by: Matthew Gerlach <matthew.gerlach@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index f0f659139f22cb9649d1cb48bc23a0409fafa5d0..effd242f6bf709a53659b4de2a2da728052d086f 100644 (file)
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -130,16 +130,19 @@
                cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
+                       clock-frequency = <150000000>;
                };
 
                cb_intosc_ls_clk: cb-intosc-ls-clk {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
+                       clock-frequency = <300000000>;
                };
 
                f2s_free_clk: f2s-free-clk {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
+                       status = "disabled";
                };
 
                osc1: osc1 {